drm/amdgpu: fix IH ring allocation for bus addresses (v2)
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 25 Aug 2015 02:46:13 +0000 (22:46 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 25 Aug 2015 14:09:30 +0000 (10:09 -0400)
Use pci_alloc_consistent rather than kzalloc since we
need 256 byte aligned memory for the ring buffer.

v2: fix copy paste typo in free function noticed
by Jammy.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=91749

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c

index 90044b2..5c8a803 100644 (file)
@@ -98,18 +98,12 @@ int amdgpu_ih_ring_init(struct amdgpu_device *adev, unsigned ring_size,
                        /* add 8 bytes for the rptr/wptr shadows and
                         * add them to the end of the ring allocation.
                         */
-                       adev->irq.ih.ring = kzalloc(adev->irq.ih.ring_size + 8, GFP_KERNEL);
+                       adev->irq.ih.ring = pci_alloc_consistent(adev->pdev,
+                                                                adev->irq.ih.ring_size + 8,
+                                                                &adev->irq.ih.rb_dma_addr);
                        if (adev->irq.ih.ring == NULL)
                                return -ENOMEM;
-                       adev->irq.ih.rb_dma_addr = pci_map_single(adev->pdev,
-                                                                 (void *)adev->irq.ih.ring,
-                                                                 adev->irq.ih.ring_size,
-                                                                 PCI_DMA_BIDIRECTIONAL);
-                       if (pci_dma_mapping_error(adev->pdev, adev->irq.ih.rb_dma_addr)) {
-                               dev_err(&adev->pdev->dev, "Failed to DMA MAP the IH RB page\n");
-                               kfree((void *)adev->irq.ih.ring);
-                               return -ENOMEM;
-                       }
+                       memset((void *)adev->irq.ih.ring, 0, adev->irq.ih.ring_size + 8);
                        adev->irq.ih.wptr_offs = (adev->irq.ih.ring_size / 4) + 0;
                        adev->irq.ih.rptr_offs = (adev->irq.ih.ring_size / 4) + 1;
                }
@@ -149,9 +143,9 @@ void amdgpu_ih_ring_fini(struct amdgpu_device *adev)
                        /* add 8 bytes for the rptr/wptr shadows and
                         * add them to the end of the ring allocation.
                         */
-                       pci_unmap_single(adev->pdev, adev->irq.ih.rb_dma_addr,
-                                        adev->irq.ih.ring_size + 8, PCI_DMA_BIDIRECTIONAL);
-                       kfree((void *)adev->irq.ih.ring);
+                       pci_free_consistent(adev->pdev, adev->irq.ih.ring_size + 8,
+                                           (void *)adev->irq.ih.ring,
+                                           adev->irq.ih.rb_dma_addr);
                        adev->irq.ih.ring = NULL;
                }
        } else {