pci: pci-uclass: Add VF BAR map support for Enhanced Allocation

Makes dm_pci_map_bar API available to map BAR for Virtual function
PCI devices which support Enhanced Allocation.

Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 51871bf..23135eb 100644 (file)
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -1409,14 +1409,55 @@ pci_addr_t dm_pci_phys_to_bus(struct udevice *dev, phys_addr_t phys_addr,
        return bus_addr;
 }
 
+static phys_addr_t dm_pci_map_ea_virt(struct udevice *dev, int ea_off,
+                                     struct pci_child_platdata *pdata)
+{
+       phys_addr_t addr = 0;
+
+       /*
+        * In the case of a Virtual Function device using BAR
+        * base and size, add offset for VFn BAR(1, 2, 3...n)
+        */
+       if (pdata->is_virtfn) {
+               size_t sz;
+               u32 ea_entry;
+
+               /* MaxOffset, 1st DW */
+               dm_pci_read_config32(dev, ea_off + 8, &ea_entry);
+               sz = ea_entry & PCI_EA_FIELD_MASK;
+               /* Fill up lower 2 bits */
+               sz |= (~PCI_EA_FIELD_MASK);
+
+               if (ea_entry & PCI_EA_IS_64) {
+                       /* MaxOffset 2nd DW */
+                       dm_pci_read_config32(dev, ea_off + 16, &ea_entry);
+                       sz |= ((u64)ea_entry) << 32;
+               }
+
+               addr = (pdata->virtid - 1) * (sz + 1);
+       }
+
+       return addr;
+}
+
 static void *dm_pci_map_ea_bar(struct udevice *dev, int bar, int flags,
-                              int ea_off)
+                              int ea_off, struct pci_child_platdata *pdata)
 {
        int ea_cnt, i, entry_size;
        int bar_id = (bar - PCI_BASE_ADDRESS_0) >> 2;
        u32 ea_entry;
        phys_addr_t addr;
 
+       if (IS_ENABLED(CONFIG_PCI_SRIOV)) {
+               /*
+                * In the case of a Virtual Function device, device is
+                * Physical function, so pdata will point to required VF
+                * specific data.
+                */
+               if (pdata->is_virtfn)
+                       bar_id += PCI_EA_BEI_VF_BAR0;
+       }
+
        /* EA capability structure header */
        dm_pci_read_config32(dev, ea_off, &ea_entry);
        ea_cnt = (ea_entry >> 16) & PCI_EA_NUM_ENT_MASK;
@@ -1439,6 +1480,9 @@ static void *dm_pci_map_ea_bar(struct udevice *dev, int bar, int flags,
                        addr |= ((u64)ea_entry) << 32;
                }
 
+               if (IS_ENABLED(CONFIG_PCI_SRIOV))
+                       addr += dm_pci_map_ea_virt(dev, ea_off, pdata);
+
                /* size ignored for now */
                return map_physmem(addr, 0, flags);
        }
@@ -1448,20 +1492,33 @@ static void *dm_pci_map_ea_bar(struct udevice *dev, int bar, int flags,
 
 void *dm_pci_map_bar(struct udevice *dev, int bar, int flags)
 {
+       struct pci_child_platdata *pdata = dev_get_parent_platdata(dev);
+       struct udevice *udev = dev;
        pci_addr_t pci_bus_addr;
        u32 bar_response;
        int ea_off;
 
+       if (IS_ENABLED(CONFIG_PCI_SRIOV)) {
+               /*
+                * In case of Virtual Function devices, use PF udevice
+                * as EA capability is defined in Physical Function
+                */
+               if (pdata->is_virtfn)
+                       udev = pdata->pfdev;
+       }
+
        /*
         * if the function supports Enhanced Allocation use that instead of
         * BARs
+        * Incase of virtual functions, pdata will help read VF BEI
+        * and EA entry size.
         */
-       ea_off = dm_pci_find_capability(dev, PCI_CAP_ID_EA);
+       ea_off = dm_pci_find_capability(udev, PCI_CAP_ID_EA);
        if (ea_off)
-               return dm_pci_map_ea_bar(dev, bar, flags, ea_off);
+               return dm_pci_map_ea_bar(udev, bar, flags, ea_off, pdata);
 
        /* read BAR address */
-       dm_pci_read_config32(dev, bar, &bar_response);
+       dm_pci_read_config32(udev, bar, &bar_response);
        pci_bus_addr = (pci_addr_t)(bar_response & ~0xf);
 
        /*
@@ -1470,7 +1527,7 @@ void *dm_pci_map_bar(struct udevice *dev, int bar, int flags)
         * linear mapping.  In the future, this could read the BAR size
         * and pass that as the size if needed.
         */
-       return dm_pci_bus_to_virt(dev, pci_bus_addr, flags, 0, MAP_NOCACHE);
+       return dm_pci_bus_to_virt(udev, pci_bus_addr, flags, 0, MAP_NOCACHE);
 }
 
 static int _dm_pci_find_next_capability(struct udevice *dev, u8 pos, int cap)

diff --git a/include/pci.h b/include/pci.h
index 115d331..1c5b366 100644 (file)
--- a/include/pci.h
+++ b/include/pci.h
@@ -465,6 +465,9 @@
 #define PCI_EA_FIRST_ENT       4       /* First EA Entry in List */
 #define  PCI_EA_ES             0x00000007 /* Entry Size */
 #define  PCI_EA_BEI            0x000000f0 /* BAR Equivalent Indicator */
+/* 9-14 map to VF BARs 0-5 respectively */
+#define  PCI_EA_BEI_VF_BAR0    9
+#define  PCI_EA_BEI_VF_BAR5    14
 /* Base, MaxOffset registers */
 /* bit 0 is reserved */
 #define  PCI_EA_IS_64          0x00000002      /* 64-bit field flag */