+2009-12-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ * sysdeps/x86_64/multiarch/init-arch.h: Include <ifunc-defines.h>
+ if __ASSEMBLER__ is defined.
+ (bit_SSSE3): New. Defined for __ASSEMBLER__.
+ (bit_SSE4_2): Likewise.
+ (index_SSSE3): Likewise.
+ (index_SSE4_2): Likewise.
+ * sysdeps/x86_64/multiarch/rawmemchr.S: Include <init-arch.h>
+ instead of <ifunc-defines.h>. Use bit_XXX and index_XXX to
+ check processor feature.
+ * sysdeps/x86_64/multiarch/strchr.S: Likewise.
+ * sysdeps/x86_64/multiarch/strcmp.S: Likewise.
+ * sysdeps/x86_64/multiarch/strcpy.S: Likewise.
+ * sysdeps/x86_64/multiarch/strcspn.S: Likewise.
+ * sysdeps/x86_64/multiarch/strlen.S: Likewise.
+ * sysdeps/x86_64/multiarch/strrchr.S: Likewise.
+ * sysdeps/x86_64/multiarch/strspn.S: Likewise.
+
2009-12-08 Kaz Kojima <kkojima@rr.iij4u.or.jp>
* sysdeps/sh/elf/initfini.c: Update according to generic/initfini.c.
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
02111-1307 USA. */
+#ifdef __ASSEMBLER__
+
+#include <ifunc-defines.h>
+
+#define bit_SSSE3 (1 << 9)
+#define bit_SSE4_2 (1 << 20)
+
+#define index_SSSE3 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
+#define index_SSE4_2 COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET
+
+#else /* __ASSEMBLER__ */
+
#include <sys/param.h>
enum
#define HAS_POPCOUNT HAS_CPU_FEATURE (COMMON_CPUID_INDEX_1, ecx, 23)
#define HAS_SSE4_2 HAS_CPU_FEATURE (COMMON_CPUID_INDEX_1, ecx, 20)
#define HAS_FMA HAS_CPU_FEATURE (COMMON_CPUID_INDEX_1, ecx, 12)
+
+#endif /* __ASSEMBLER__ */
02111-1307 USA. */
#include <sysdep.h>
-#include <ifunc-defines.h>
+#include <init-arch.h>
/* Define multiple versions only for the definition in lib. */
jne 1f
call __init_cpu_features
1: leaq __rawmemchr_sse2(%rip), %rax
- testl $(1<<20), __cpu_features+CPUID_OFFSET+COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET(%rip)
+ testl $bit_SSE4_2, __cpu_features+CPUID_OFFSET+index_SSE4_2(%rip)
jz 2f
leaq __rawmemchr_sse42(%rip), %rax
2: ret
02111-1307 USA. */
#include <sysdep.h>
-#include <ifunc-defines.h>
+#include <init-arch.h>
/* Define multiple versions only for the definition in libc. */
jne 1f
call __init_cpu_features
1: leaq __strchr_sse2(%rip), %rax
- testl $(1<<20), __cpu_features+CPUID_OFFSET+COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET(%rip)
+ testl $bit_SSE4_2, __cpu_features+CPUID_OFFSET+index_SSE4_2(%rip)
jz 2f
leaq __strchr_sse42(%rip), %rax
2: ret
02111-1307 USA. */
#include <sysdep.h>
-#include <ifunc-defines.h>
+#include <init-arch.h>
#ifdef USE_AS_STRNCMP
/* Since the counter, %r11, is unsigned, we branch to strcmp_exitz
call __init_cpu_features
1:
leaq STRCMP_SSE42(%rip), %rax
- testl $(1<<20), __cpu_features+CPUID_OFFSET+COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET(%rip)
+ testl $bit_SSE4_2, __cpu_features+CPUID_OFFSET+index_SSE4_2(%rip)
jnz 2f
leaq STRCMP_SSSE3(%rip), %rax
- testl $(1<<9), __cpu_features+CPUID_OFFSET+COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET(%rip)
+ testl $bit_SSSE3, __cpu_features+CPUID_OFFSET+index_SSSE3(%rip)
jnz 2f
leaq STRCMP_SSE2(%rip), %rax
2: ret
02111-1307 USA. */
#include <sysdep.h>
-#include <ifunc-defines.h>
+#include <init-arch.h>
#if !defined (USE_AS_STPCPY) && !defined (USE_AS_STRNCPY)
# ifndef STRCPY
jne 1f
call __init_cpu_features
1: leaq STRCPY_SSE2(%rip), %rax
- testl $(1<<9), __cpu_features+CPUID_OFFSET+COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET(%rip)
+ testl $bit_SSSE3, __cpu_features+CPUID_OFFSET+index_SSSE3(%rip)
jz 2f
leaq STRCPY_SSSE3(%rip), %rax
2: ret
#ifdef HAVE_SSE4_SUPPORT
#include <sysdep.h>
-#include <ifunc-defines.h>
+#include <init-arch.h>
#ifdef USE_AS_STRPBRK
#define STRCSPN_SSE42 __strpbrk_sse42
jne 1f
call __init_cpu_features
1: leaq STRCSPN_SSE2(%rip), %rax
- testl $(1<<20), __cpu_features+CPUID_OFFSET+COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET(%rip)
+ testl $bit_SSE4_2, __cpu_features+CPUID_OFFSET+index_SSE4_2(%rip)
jz 2f
leaq STRCSPN_SSE42(%rip), %rax
2: ret
02111-1307 USA. */
#include <sysdep.h>
-#include <ifunc-defines.h>
+#include <init-arch.h>
/* Define multiple versions only for the definition in libc and for
jne 1f
call __init_cpu_features
1: leaq __strlen_sse2(%rip), %rax
- testl $(1<<20), __cpu_features+CPUID_OFFSET+COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET(%rip)
+ testl $bit_SSE4_2, __cpu_features+CPUID_OFFSET+index_SSE4_2(%rip)
jz 2f
leaq __strlen_sse42(%rip), %rax
2: ret
02111-1307 USA. */
#include <sysdep.h>
-#include <ifunc-defines.h>
+#include <init-arch.h>
/* Define multiple versions only for the definition in libc and for
jne 1f
call __init_cpu_features
1: leaq __strrchr_sse2(%rip), %rax
- testl $(1<<20), __cpu_features+CPUID_OFFSET+COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET(%rip)
+ testl $bit_SSE4_2, __cpu_features+CPUID_OFFSET+index_SSE4_2(%rip)
jz 2f
leaq __strrchr_sse42(%rip), %rax
2: ret
#ifdef HAVE_SSE4_SUPPORT
#include <sysdep.h>
-#include <ifunc-defines.h>
+#include <init-arch.h>
/* Define multiple versions only for the definition in libc. */
#ifndef NOT_IN_libc
jne 1f
call __init_cpu_features
1: leaq __strspn_sse2(%rip), %rax
- testl $(1<<20), __cpu_features+CPUID_OFFSET+COMMON_CPUID_INDEX_1*CPUID_SIZE+CPUID_ECX_OFFSET(%rip)
+ testl $bit_SSE4_2, __cpu_features+CPUID_OFFSET+index_SSE4_2(%rip)
jz 2f
leaq __strspn_sse42(%rip), %rax
2: ret