irqchip/irq-brcmstb-l2: Switch to IRQCHIP_PLATFORM_DRIVER
authorFlorian Fainelli <f.fainelli@gmail.com>
Wed, 20 Oct 2021 18:48:54 +0000 (11:48 -0700)
committerMarc Zyngier <maz@kernel.org>
Wed, 20 Oct 2021 19:06:33 +0000 (20:06 +0100)
Allow the user selection and building of this interrupt controller
driver as a module since it is used on ARM/ARM64 based systems as a
second level interrupt controller hanging off the ARM GIC and is
therefore loadable during boot.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20211020184859.2705451-9-f.fainelli@gmail.com
drivers/irqchip/Kconfig
drivers/irqchip/irq-brcmstb-l2.c

index f3b5377..30018cc 100644 (file)
@@ -128,7 +128,9 @@ config BCM7120_L2_IRQ
        select IRQ_DOMAIN
 
 config BRCMSTB_L2_IRQ
-       bool
+       tristate "Broadcom STB generic L2 interrupt controller driver"
+       depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC
+       default ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC
        select GENERIC_IRQ_CHIP
        select IRQ_DOMAIN
 
index 8e09115..e4efc08 100644 (file)
@@ -275,16 +275,18 @@ static int __init brcmstb_l2_edge_intc_of_init(struct device_node *np,
 {
        return brcmstb_l2_intc_of_init(np, parent, &l2_edge_intc_init);
 }
-IRQCHIP_DECLARE(brcmstb_l2_intc, "brcm,l2-intc", brcmstb_l2_edge_intc_of_init);
-IRQCHIP_DECLARE(brcmstb_hif_spi_l2_intc, "brcm,hif-spi-l2-intc",
-               brcmstb_l2_edge_intc_of_init);
-IRQCHIP_DECLARE(brcmstb_upg_aux_aon_l2_intc, "brcm,upg-aux-aon-l2-intc",
-               brcmstb_l2_edge_intc_of_init);
 
 static int __init brcmstb_l2_lvl_intc_of_init(struct device_node *np,
        struct device_node *parent)
 {
        return brcmstb_l2_intc_of_init(np, parent, &l2_lvl_intc_init);
 }
-IRQCHIP_DECLARE(bcm7271_l2_intc, "brcm,bcm7271-l2-intc",
-       brcmstb_l2_lvl_intc_of_init);
+
+IRQCHIP_PLATFORM_DRIVER_BEGIN(brcmstb_l2)
+IRQCHIP_MATCH("brcm,l2-intc", brcmstb_l2_edge_intc_of_init)
+IRQCHIP_MATCH("brcm,hif-spi-l2-intc", brcmstb_l2_edge_intc_of_init)
+IRQCHIP_MATCH("brcm,upg-aux-aon-l2-intc", brcmstb_l2_edge_intc_of_init)
+IRQCHIP_MATCH("brcm,bcm7271-l2-intc", brcmstb_l2_lvl_intc_of_init)
+IRQCHIP_PLATFORM_DRIVER_END(brcmstb_l2)
+MODULE_DESCRIPTION("Broadcom STB generic L2 interrupt controller");
+MODULE_LICENSE("GPL v2");