[InstCombine] add tests for div/rem with 0 select arm; NFC

More coverage for D115173 and its div sibling. These are
existing transforms handled by simplifyDivRemOfSelectWithZeroOp().

diff --git a/llvm/test/Transforms/InstCombine/div.ll b/llvm/test/Transforms/InstCombine/div.ll
index 858d7db..f84ec87 100644 (file)
--- a/llvm/test/Transforms/InstCombine/div.ll
+++ b/llvm/test/Transforms/InstCombine/div.ll
@@ -1112,6 +1112,15 @@ define i32 @sdiv_constant_dividend_select_of_constants_divisor_use(i1 %b) {
   ret i32 %r
 }
 
+define i32 @sdiv_constant_dividend_select_of_constants_divisor_0_arm(i1 %b) {
+; CHECK-LABEL: @sdiv_constant_dividend_select_of_constants_divisor_0_arm(
+; CHECK-NEXT:    ret i32 3
+;
+  %s = select i1 %b, i32 12, i32 0
+  %r = sdiv i32 42, %s
+  ret i32 %r
+}
+
 define i32 @sdiv_constant_dividend_select_divisor1(i1 %b, i32 %x) {
 ; CHECK-LABEL: @sdiv_constant_dividend_select_divisor1(
 ; CHECK-NEXT:    [[S:%.*]] = select i1 [[B:%.*]], i32 [[X:%.*]], i32 -3
@@ -1200,6 +1209,15 @@ define i32 @udiv_constant_dividend_select_of_constants_divisor_use(i1 %b) {
   ret i32 %r
 }
 
+define i32 @udiv_constant_dividend_select_of_constants_divisor_0_arm(i1 %b) {
+; CHECK-LABEL: @udiv_constant_dividend_select_of_constants_divisor_0_arm(
+; CHECK-NEXT:    ret i32 3
+;
+  %s = select i1 %b, i32 12, i32 0
+  %r = udiv i32 42, %s
+  ret i32 %r
+}
+
 define i32 @udiv_constant_dividend_select_divisor1(i1 %b, i32 %x) {
 ; CHECK-LABEL: @udiv_constant_dividend_select_divisor1(
 ; CHECK-NEXT:    [[S:%.*]] = select i1 [[B:%.*]], i32 [[X:%.*]], i32 -3

diff --git a/llvm/test/Transforms/InstCombine/rem.ll b/llvm/test/Transforms/InstCombine/rem.ll
index 468ccb2..cceb12a 100644 (file)
--- a/llvm/test/Transforms/InstCombine/rem.ll
+++ b/llvm/test/Transforms/InstCombine/rem.ll
@@ -799,6 +799,15 @@ define i32 @srem_constant_dividend_select_of_constants_divisor_use(i1 %b) {
   ret i32 %r
 }
 
+define i32 @srem_constant_dividend_select_of_constants_divisor_0_arm(i1 %b) {
+; CHECK-LABEL: @srem_constant_dividend_select_of_constants_divisor_0_arm(
+; CHECK-NEXT:    ret i32 6
+;
+  %s = select i1 %b, i32 12, i32 0
+  %r = srem i32 42, %s
+  ret i32 %r
+}
+
 define i32 @srem_constant_dividend_select_divisor1(i1 %b, i32 %x) {
 ; CHECK-LABEL: @srem_constant_dividend_select_divisor1(
 ; CHECK-NEXT:    [[S:%.*]] = select i1 [[B:%.*]], i32 [[X:%.*]], i32 -3
@@ -887,6 +896,15 @@ define i32 @urem_constant_dividend_select_of_constants_divisor_use(i1 %b) {
   ret i32 %r
 }
 
+define i32 @urem_constant_dividend_select_of_constants_divisor_0_arm(i1 %b) {
+; CHECK-LABEL: @urem_constant_dividend_select_of_constants_divisor_0_arm(
+; CHECK-NEXT:    ret i32 6
+;
+  %s = select i1 %b, i32 12, i32 0
+  %r = urem i32 42, %s
+  ret i32 %r
+}
+
 define i32 @urem_constant_dividend_select_divisor1(i1 %b, i32 %x) {
 ; CHECK-LABEL: @urem_constant_dividend_select_divisor1(
 ; CHECK-NEXT:    [[S:%.*]] = select i1 [[B:%.*]], i32 [[X:%.*]], i32 -3