mtd: spi-nor: spansion: convert USE_CLSR to a manufacturer flag

Now that all functions using that flag are local to the spansion module,
we can convert the flag to a manufacturer one.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Pratyush Yadav <p.yadav@ti.com> # on mt35xu512aba, s28hs512t
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220223134358.1914798-30-michael@walle.cc

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index e2b8b0a..f5a2f37 100644 (file)
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -2447,9 +2447,6 @@ static void spi_nor_init_flags(struct spi_nor *nor)
 
        if (flags & NO_CHIP_ERASE)
                nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
-
-       if (flags & USE_CLSR)
-               nor->flags |= SNOR_F_USE_CLSR;
 }
 
 /**

diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index a02bf54..2130a96 100644 (file)
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -14,7 +14,6 @@
 enum spi_nor_option_flags {
        SNOR_F_HAS_SR_TB        = BIT(1),
        SNOR_F_NO_OP_CHIP_ERASE = BIT(2),
-       SNOR_F_USE_CLSR         = BIT(4),
        SNOR_F_BROKEN_RESET     = BIT(5),
        SNOR_F_4B_OPCODES       = BIT(6),
        SNOR_F_HAS_4BAIT        = BIT(7),
@@ -347,7 +346,6 @@ struct spi_nor_fixups {
  *   SPI_NOR_NO_ERASE:        no erase command needed.
  *   NO_CHIP_ERASE:           chip does not support chip erase.
  *   SPI_NOR_NO_FR:           can't do fastread.
- *   USE_CLSR:                use CLSR command.
  *
  * @no_sfdp_flags:  flags that indicate support that can be discovered via SFDP.
  *                  Used when SFDP tables are not defined in the flash. These
@@ -398,7 +396,6 @@ struct flash_info {
 #define SPI_NOR_NO_ERASE               BIT(6)
 #define NO_CHIP_ERASE                  BIT(7)
 #define SPI_NOR_NO_FR                  BIT(8)
-#define USE_CLSR                       BIT(9)
 
        u8 no_sfdp_flags;
 #define SPI_NOR_SKIP_SFDP              BIT(0)

diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
index dbafe97..32d3301 100644 (file)
--- a/drivers/mtd/spi-nor/spansion.c
+++ b/drivers/mtd/spi-nor/spansion.c
@@ -8,6 +8,9 @@
 
 #include "core.h"
 
+/* flash_info mfr_flag. Used to clear sticky prorietary SR bits. */
+#define USE_CLSR       BIT(0)
+
 #define SPINOR_OP_CLSR         0x30    /* Clear status register 1 */
 #define SPINOR_OP_RD_ANY_REG                   0x65    /* Read any register */
 #define SPINOR_OP_WR_ANY_REG                   0x71    /* Write any register */
@@ -212,43 +215,53 @@ static const struct flash_info spansion_nor_parts[] = {
        { "s25sl064p",  INFO(0x010216, 0x4d00,  64 * 1024, 128)
                NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
        { "s25fl128s0", INFO6(0x012018, 0x4d0080, 256 * 1024, 64)
-               FLAGS(USE_CLSR)
-               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+               MFR_FLAGS(USE_CLSR)
+       },
        { "s25fl128s1", INFO6(0x012018, 0x4d0180, 64 * 1024, 256)
-               FLAGS(USE_CLSR)
-               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+               MFR_FLAGS(USE_CLSR)
+       },
        { "s25fl256s0", INFO6(0x010219, 0x4d0080, 256 * 1024, 128)
-               FLAGS(USE_CLSR)
                NO_SFDP_FLAGS(SPI_NOR_SKIP_SFDP | SPI_NOR_DUAL_READ |
-                             SPI_NOR_QUAD_READ) },
+                             SPI_NOR_QUAD_READ)
+               MFR_FLAGS(USE_CLSR)
+       },
        { "s25fl256s1", INFO6(0x010219, 0x4d0180, 64 * 1024, 512)
-               FLAGS(USE_CLSR)
-               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+               MFR_FLAGS(USE_CLSR)
+       },
        { "s25fl512s",  INFO6(0x010220, 0x4d0080, 256 * 1024, 256)
-               FLAGS(SPI_NOR_HAS_LOCK | USE_CLSR)
-               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+               FLAGS(SPI_NOR_HAS_LOCK)
+               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+               MFR_FLAGS(USE_CLSR)
+       },
        { "s25fs128s1", INFO6(0x012018, 0x4d0181, 64 * 1024, 256)
-               FLAGS(USE_CLSR)
                NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+               MFR_FLAGS(USE_CLSR)
                .fixups = &s25fs_s_nor_fixups, },
        { "s25fs256s0", INFO6(0x010219, 0x4d0081, 256 * 1024, 128)
-               FLAGS(USE_CLSR)
-               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+               MFR_FLAGS(USE_CLSR)
+       },
        { "s25fs256s1", INFO6(0x010219, 0x4d0181, 64 * 1024, 512)
-               FLAGS(USE_CLSR)
-               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+               MFR_FLAGS(USE_CLSR)
+       },
        { "s25fs512s",  INFO6(0x010220, 0x4d0081, 256 * 1024, 256)
-               FLAGS(USE_CLSR)
                NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+               MFR_FLAGS(USE_CLSR)
                .fixups = &s25fs_s_nor_fixups, },
        { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024,  64) },
        { "s25sl12801", INFO(0x012018, 0x0301,  64 * 1024, 256) },
        { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024,  64)
-               FLAGS(USE_CLSR)
-               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+               MFR_FLAGS(USE_CLSR)
+       },
        { "s25fl129p1", INFO(0x012018, 0x4d01,  64 * 1024, 256)
-               FLAGS(USE_CLSR)
-               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+               NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
+               MFR_FLAGS(USE_CLSR)
+       },
        { "s25sl004a",  INFO(0x010212,      0,  64 * 1024,   8) },
        { "s25sl008a",  INFO(0x010213,      0,  64 * 1024,  16) },
        { "s25sl016a",  INFO(0x010214,      0,  64 * 1024,  32) },
@@ -370,7 +383,7 @@ static void spansion_nor_late_init(struct spi_nor *nor)
                nor->mtd.erasesize = nor->info->sector_size;
        }
 
-       if (nor->flags & SNOR_F_USE_CLSR)
+       if (nor->info->mfr_flags & USE_CLSR)
                nor->params->ready = spi_nor_sr_ready_and_clear;
 }