arm64: dts: qcom: sm8250-xiaomi-elish-boe: Add mdss and dsi panel
authorJianhua Lu <lujianhua000@gmail.com>
Thu, 23 Mar 2023 00:59:24 +0000 (08:59 +0800)
committerBjorn Andersson <andersson@kernel.org>
Fri, 7 Apr 2023 18:40:36 +0000 (11:40 -0700)
Add nodes for BOE NT36523 panel found in xiaomi-elish. This panel
is a dual dsi mode panel and the dsi phy type is cphy.

Signed-off-by: Jianhua Lu <lujianhua000@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230323005925.23179-2-lujianhua000@gmail.com
arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-boe.dts
arch/arm64/boot/dts/qcom/sm8250-xiaomi-elish-common.dtsi

index bd9ad10..8b2ae39 100644 (file)
@@ -11,3 +11,8 @@
        model = "Xiaomi Mi Pad 5 Pro (BOE)";
        compatible = "xiaomi,elish", "qcom,sm8250";
 };
+
+&display_panel {
+       compatible = "xiaomi,elish-boe-nt36523";
+       status = "okay";
+};
index 4343627..8af6a01 100644 (file)
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/arm/qcom,ids.h>
+#include <dt-bindings/phy/phy.h>
 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
 #include "sm8250.dtsi"
 #include "pm8150.dtsi"
        status = "okay";
 };
 
+&dsi0 {
+       vdda-supply = <&vreg_l9a_1p2>;
+       qcom,dual-dsi-mode;
+       qcom,sync-dual-dsi;
+       qcom,master-dsi;
+       status = "okay";
+
+       display_panel: panel@0 {
+               reg = <0>;
+               vddio-supply = <&vreg_l14a_1p88>;
+               reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>;
+               backlight = <&backlight>;
+
+               status = "disabled";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+
+                               panel_in_0: endpoint {
+                                       remote-endpoint = <&dsi0_out>;
+                               };
+                       };
+
+                       port@1{
+                               reg = <1>;
+
+                               panel_in_1: endpoint {
+                                       remote-endpoint = <&dsi1_out>;
+                               };
+                       };
+
+               };
+       };
+};
+
+&dsi0_out {
+       data-lanes = <0 1 2>;
+       remote-endpoint = <&panel_in_0>;
+};
+
+&dsi0_phy {
+       vdds-supply = <&vreg_l5a_0p88>;
+       phy-type = <PHY_TYPE_CPHY>;
+       status = "okay";
+};
+
+&dsi1 {
+       vdda-supply = <&vreg_l9a_1p2>;
+       qcom,dual-dsi-mode;
+       qcom,sync-dual-dsi;
+       /* DSI1 is slave, so use DSI0 clocks */
+       assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
+       status = "okay";
+};
+
+&dsi1_out {
+       data-lanes = <0 1 2>;
+       remote-endpoint = <&panel_in_1>;
+};
+
+&dsi1_phy {
+       vdds-supply = <&vreg_l5a_0p88>;
+       phy-type = <PHY_TYPE_CPHY>;
+       status = "okay";
+};
+
 &gmu {
        status = "okay";
 };
        };
 };
 
+&mdss {
+       status = "okay";
+};
+
 &pcie0 {
        status = "okay";
 };