gpadc: read sample result in one loop

RR bit is used to inform HW for sample result read.
it needs to hold the RR bit for all channels result read.

this patch moves the lines to set/clear RR bit outside the loop.

Change-Id: I6e810d03eab6f59d16315fb38ae81864dc37bd02
Signed-off-by: Bin Yang <bin.yang@intel.com>

diff --git a/drivers/hwmon/intel_mid_gpadc.c b/drivers/hwmon/intel_mid_gpadc.c
index 9582bad..652459f 100644 (file)
--- a/drivers/hwmon/intel_mid_gpadc.c
+++ b/drivers/hwmon/intel_mid_gpadc.c
@@ -388,14 +388,13 @@ int intel_mid_gpadc_sample(void *handle, int sample_count, ...)
                        ret = -ETIMEDOUT;
                        goto fail;
                }
+               gpadc_set_bits(ADC1CNTL3, ADC1CNTL3_RRDATARD);
                for (i = 0; i < rq->count; ++i) {
                        tmp = 0;
-                       gpadc_set_bits(ADC1CNTL3, ADC1CNTL3_RRDATARD);
                        gpadc_read(ADC1SNS0H + 2 * rq->addr[i], &data);
                        tmp += data << 2;
                        gpadc_read(ADC1SNS0H + 2 * rq->addr[i] + 1, &data);
                        tmp += data & 0x3;
-                       gpadc_clear_bits(ADC1CNTL3, ADC1CNTL3_RRDATARD);
 
                        /**
                         * Using the calibration data, we have the voltage and
@@ -409,6 +408,7 @@ int intel_mid_gpadc_sample(void *handle, int sample_count, ...)
                                tmp -= mgi->izse + mgi->ige * tmp / 1023;
                        *val[i] += tmp;
                }
+               gpadc_clear_bits(ADC1CNTL3, ADC1CNTL3_RRDATARD);
                mgi->rnd_done = 0;
        }