[mips] Add _GCC_HAVE_SYNC_COMPARE_AND_SWAP macros.
authorDaniel Sanders <daniel.sanders@imgtec.com>
Tue, 22 Dec 2015 12:59:30 +0000 (12:59 +0000)
committerDaniel Sanders <daniel.sanders@imgtec.com>
Tue, 22 Dec 2015 12:59:30 +0000 (12:59 +0000)
This fixes the 'pure virtual function called' failure with ThreadPool in a
clang-built clang. This fixes the llvm-mips-linux builder.

llvm-svn: 256240

clang/lib/Basic/Targets.cpp
clang/test/Preprocessor/predefined-macros.c

index e6864d9..28351a2 100644 (file)
@@ -6585,6 +6585,12 @@ public:
 
     Builder.defineMacro("_MIPS_ARCH", "\"" + CPU + "\"");
     Builder.defineMacro("_MIPS_ARCH_" + StringRef(CPU).upper());
+
+    // These shouldn't be defined for MIPS-I but there's no need to check
+    // for that since MIPS-I isn't supported.
+    Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
+    Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
+    Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
   }
 
   ArrayRef<Builtin::Info> getTargetBuiltins() const override {
@@ -6959,6 +6965,8 @@ public:
     }
     else
       llvm_unreachable("Invalid ABI for Mips64.");
+
+    Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
   }
   ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
     static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
index 4130f7a..1f68a08 100644 (file)
 // RUN: %clang_cc1 %s -E -dM -o - -triple armv6 -target-cpu cortex-m0 \
 // RUN:   | FileCheck %s --check-prefix=CHECK-SYNC_CAS_ARMv6
 // CHECK-SYNC_CAS_ARMv6-NOT: __GCC_HAVE_SYNC_COMPARE_AND_SWAP
+//
+// RUN: %clang_cc1 %s -E -dM -o - -triple mips -target-cpu mips2 \
+// RUN:   | FileCheck %s --check-prefix=CHECK-SYNC_CAS_MIPS \
+// RUN:         --check-prefix=CHECK-SYNC_CAS_MIPS32
+// RUN: %clang_cc1 %s -E -dM -o - -triple mips64 -target-cpu mips3 \
+// RUN:   | FileCheck %s --check-prefix=CHECK-SYNC_CAS_MIPS \
+// RUN:         --check-prefix=CHECK-SYNC_CAS_MIPS64
+// CHECK-SYNC_CAS_MIPS:       __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
+// CHECK-SYNC_CAS_MIPS:       __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
+// CHECK-SYNC_CAS_MIPS:       __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
+// CHECK-SYNC_CAS_MIPS32-NOT: __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8
+// CHECK-SYNC_CAS_MIPS64:     __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8