remoteproc: k3-r5: Use separate compatible string for TI AM62x SoC family

AM62 and AM62A SoCs use single core R5F which is a new scenario
different than the one being used with CLUSTER_MODE_SINGLECPU which is
for utilizing a single core from a set of cores available in R5F cluster
present in the SoC.

To support this single core scenario map it with newly defined
CLUSTER_MODE_SINGLECORE and use it when compatible is set to
ti,am62-r5fss.

Also set PROC_BOOT_CFG_FLAG_R5_SINGLE_CORE config for
CLUSTER_MODE_SINGLECORE too as it is required by R5 core when it is
being as general purpose core instead of device manager.

For IPC-only mode when config flag PROC_BOOT_CFG_FLAG_R5_SINGLE_CORE
is set, skip overriding to CLUSTER_MODE_SINGLECPU when
CLUSTER_MODE_SINGLECORE is set as same flag is applicable for single
core configuration too.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Link: https://lore.kernel.org/r/20230327152832.923480-4-devarsht@ti.com
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>

diff --git a/drivers/remoteproc/ti_k3_r5_remoteproc.c b/drivers/remoteproc/ti_k3_r5_remoteproc.c
index fd035a8..23fe44d 100644 (file)
--- a/drivers/remoteproc/ti_k3_r5_remoteproc.c
+++ b/drivers/remoteproc/ti_k3_r5_remoteproc.c
@@ -71,14 +71,16 @@ struct k3_r5_mem {
 /*
  * All cluster mode values are not applicable on all SoCs. The following
  * are the modes supported on various SoCs:
- *   Split mode      : AM65x, J721E, J7200 and AM64x SoCs
- *   LockStep mode   : AM65x, J721E and J7200 SoCs
- *   Single-CPU mode : AM64x SoCs only
+ *   Split mode       : AM65x, J721E, J7200 and AM64x SoCs
+ *   LockStep mode    : AM65x, J721E and J7200 SoCs
+ *   Single-CPU mode  : AM64x SoCs only
+ *   Single-Core mode : AM62x, AM62A SoCs
  */
 enum cluster_mode {
        CLUSTER_MODE_SPLIT = 0,
        CLUSTER_MODE_LOCKSTEP,
        CLUSTER_MODE_SINGLECPU,
+       CLUSTER_MODE_SINGLECORE
 };
 
 /**
@@ -86,11 +88,13 @@ enum cluster_mode {
  * @tcm_is_double: flag to denote the larger unified TCMs in certain modes
  * @tcm_ecc_autoinit: flag to denote the auto-initialization of TCMs for ECC
  * @single_cpu_mode: flag to denote if SoC/IP supports Single-CPU mode
+ * @is_single_core: flag to denote if SoC/IP has only single core R5
  */
 struct k3_r5_soc_data {
        bool tcm_is_double;
        bool tcm_ecc_autoinit;
        bool single_cpu_mode;
+       bool is_single_core;
 };
 
 /**
@@ -838,7 +842,8 @@ static int k3_r5_rproc_configure(struct k3_r5_rproc *kproc)
 
        core0 = list_first_entry(&cluster->cores, struct k3_r5_core, elem);
        if (cluster->mode == CLUSTER_MODE_LOCKSTEP ||
-           cluster->mode == CLUSTER_MODE_SINGLECPU) {
+           cluster->mode == CLUSTER_MODE_SINGLECPU ||
+           cluster->mode == CLUSTER_MODE_SINGLECORE) {
                core = core0;
        } else {
                core = kproc->core;
@@ -877,7 +882,8 @@ static int k3_r5_rproc_configure(struct k3_r5_rproc *kproc)
                 * with the bit configured, so program it only on
                 * permitted cores
                 */
-               if (cluster->mode == CLUSTER_MODE_SINGLECPU) {
+               if (cluster->mode == CLUSTER_MODE_SINGLECPU ||
+                   cluster->mode == CLUSTER_MODE_SINGLECORE) {
                        set_cfg = PROC_BOOT_CFG_FLAG_R5_SINGLE_CORE;
                } else {
                        /*
@@ -1069,6 +1075,7 @@ static void k3_r5_adjust_tcm_sizes(struct k3_r5_rproc *kproc)
 
        if (cluster->mode == CLUSTER_MODE_LOCKSTEP ||
            cluster->mode == CLUSTER_MODE_SINGLECPU ||
+           cluster->mode == CLUSTER_MODE_SINGLECORE ||
            !cluster->soc_data->tcm_is_double)
                return;
 
@@ -1145,7 +1152,7 @@ static int k3_r5_rproc_configure_mode(struct k3_r5_rproc *kproc)
        single_cpu = cfg & PROC_BOOT_CFG_FLAG_R5_SINGLE_CORE ? 1 : 0;
        lockstep_en = cfg & PROC_BOOT_CFG_FLAG_R5_LOCKSTEP ? 1 : 0;
 
-       if (single_cpu)
+       if (single_cpu && mode != CLUSTER_MODE_SINGLECORE)
                mode = CLUSTER_MODE_SINGLECPU;
        if (lockstep_en)
                mode = CLUSTER_MODE_LOCKSTEP;
@@ -1265,9 +1272,12 @@ init_rmem:
                        goto err_add;
                }
 
-               /* create only one rproc in lockstep mode or single-cpu mode */
+               /* create only one rproc in lockstep, single-cpu or
+                * single core mode
+                */
                if (cluster->mode == CLUSTER_MODE_LOCKSTEP ||
-                   cluster->mode == CLUSTER_MODE_SINGLECPU)
+                   cluster->mode == CLUSTER_MODE_SINGLECPU ||
+                   cluster->mode == CLUSTER_MODE_SINGLECORE)
                        break;
        }
 
@@ -1710,19 +1720,33 @@ static int k3_r5_probe(struct platform_device *pdev)
                /*
                 * default to most common efuse configurations - Split-mode on AM64x
                 * and LockStep-mode on all others
+                * default to most common efuse configurations -
+                * Split-mode on AM64x
+                * Single core on AM62x
+                * LockStep-mode on all others
                 */
-               cluster->mode = data->single_cpu_mode ?
+               if (!data->is_single_core)
+                       cluster->mode = data->single_cpu_mode ?
                                        CLUSTER_MODE_SPLIT : CLUSTER_MODE_LOCKSTEP;
+               else
+                       cluster->mode = CLUSTER_MODE_SINGLECORE;
        }
 
-       if (cluster->mode == CLUSTER_MODE_SINGLECPU && !data->single_cpu_mode) {
+       if  ((cluster->mode == CLUSTER_MODE_SINGLECPU && !data->single_cpu_mode) ||
+            (cluster->mode == CLUSTER_MODE_SINGLECORE && !data->is_single_core)) {
                dev_err(dev, "Cluster mode = %d is not supported on this SoC\n", cluster->mode);
                return -EINVAL;
        }
 
        num_cores = of_get_available_child_count(np);
-       if (num_cores != 2) {
-               dev_err(dev, "MCU cluster requires both R5F cores to be enabled, num_cores = %d\n",
+       if (num_cores != 2 && !data->is_single_core) {
+               dev_err(dev, "MCU cluster requires both R5F cores to be enabled but num_cores is set to = %d\n",
+                       num_cores);
+               return -ENODEV;
+       }
+
+       if (num_cores != 1 && data->is_single_core) {
+               dev_err(dev, "SoC supports only single core R5 but num_cores is set to %d\n",
                        num_cores);
                return -ENODEV;
        }
@@ -1764,18 +1788,28 @@ static const struct k3_r5_soc_data am65_j721e_soc_data = {
        .tcm_is_double = false,
        .tcm_ecc_autoinit = false,
        .single_cpu_mode = false,
+       .is_single_core = false,
 };
 
 static const struct k3_r5_soc_data j7200_j721s2_soc_data = {
        .tcm_is_double = true,
        .tcm_ecc_autoinit = true,
        .single_cpu_mode = false,
+       .is_single_core = false,
 };
 
 static const struct k3_r5_soc_data am64_soc_data = {
        .tcm_is_double = true,
        .tcm_ecc_autoinit = true,
        .single_cpu_mode = true,
+       .is_single_core = false,
+};
+
+static const struct k3_r5_soc_data am62_soc_data = {
+       .tcm_is_double = false,
+       .tcm_ecc_autoinit = true,
+       .single_cpu_mode = false,
+       .is_single_core = true,
 };
 
 static const struct of_device_id k3_r5_of_match[] = {
@@ -1783,6 +1817,7 @@ static const struct of_device_id k3_r5_of_match[] = {
        { .compatible = "ti,j721e-r5fss", .data = &am65_j721e_soc_data, },
        { .compatible = "ti,j7200-r5fss", .data = &j7200_j721s2_soc_data, },
        { .compatible = "ti,am64-r5fss",  .data = &am64_soc_data, },
+       { .compatible = "ti,am62-r5fss",  .data = &am62_soc_data, },
        { .compatible = "ti,j721s2-r5fss",  .data = &j7200_j721s2_soc_data, },
        { /* sentinel */ },
 };