arm64: dts: ti: k3-j721e-main: Move secure proxy and smmu under main_navss
authorPeter Ujfalusi <peter.ujfalusi@ti.com>
Thu, 23 Jan 2020 11:45:25 +0000 (13:45 +0200)
committerTero Kristo <t-kristo@ti.com>
Fri, 24 Jan 2020 07:30:24 +0000 (09:30 +0200)
Secure proxy (NAVSS0_SEC_PROXY0) and smmu (NAVSS0_TCU) is part of the
Navigator Subsystem.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi

index 6a805be..97b194e 100644 (file)
                };
        };
 
-       smmu0: smmu@36600000 {
-               compatible = "arm,smmu-v3";
-               reg = <0x0 0x36600000 0x0 0x100000>;
-               power-domains = <&k3_pds 229 TI_SCI_PD_EXCLUSIVE>;
-               interrupt-parent = <&gic500>;
-               interrupts = <GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,
-                            <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>;
-               interrupt-names = "eventq", "gerror";
-               #iommu-cells = <1>;
-       };
-
        main_gpio_intr: interrupt-controller0 {
                compatible = "ti,sci-intr";
                ti,intr-trigger-type = <1>;
                        ti,sci-rm-range-global-event = <0xd>;
                };
 
+               secure_proxy_main: mailbox@32c00000 {
+                       compatible = "ti,am654-secure-proxy";
+                       #mbox-cells = <1>;
+                       reg-names = "target_data", "rt", "scfg";
+                       reg = <0x00 0x32c00000 0x00 0x100000>,
+                             <0x00 0x32400000 0x00 0x100000>,
+                             <0x00 0x32800000 0x00 0x100000>;
+                       interrupt-names = "rx_011";
+                       interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
+               smmu0: smmu@36600000 {
+                       compatible = "arm,smmu-v3";
+                       reg = <0x0 0x36600000 0x0 0x100000>;
+                       interrupt-parent = <&gic500>;
+                       interrupts = <GIC_SPI 772 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "eventq", "gerror";
+                       #iommu-cells = <1>;
+               };
+
                hwspinlock: spinlock@30e00000 {
                        compatible = "ti,am654-hwspinlock";
                        reg = <0x00 0x30e00000 0x00 0x1000>;
                };
        };
 
-       secure_proxy_main: mailbox@32c00000 {
-               compatible = "ti,am654-secure-proxy";
-               #mbox-cells = <1>;
-               reg-names = "target_data", "rt", "scfg";
-               reg = <0x00 0x32c00000 0x00 0x100000>,
-                     <0x00 0x32400000 0x00 0x100000>,
-                     <0x00 0x32800000 0x00 0x100000>;
-               interrupt-names = "rx_011";
-               interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-       };
-
        main_pmx0: pinmux@11c000 {
                compatible = "pinctrl-single";
                /* Proxy 0 addressing */