spi: dw: Add 32 bpw support to SPI DW DMA driver

Add Support for AxSize = 4 bytes configuration from dw dma driver if
n_bytes i.e. number of bytes per write to fifo is 4.

Number of bytes written to fifo per write is depended on the bits/word
configuration being used which the DW core driver translates to n_bytes.
Hence, for bits per word values between 17 and 32 n_bytes should be
equal to 4.

* tested on Baikal-T1 based system with DW SPI-looped back interface
transferring a chunk of data with DFS:8,12,16.

Signed-off-by: Joy Chakraborty <joychakr@google.com
Reviewed-by: Serge Semin <fancer.lancer@gmail.com
Tested-by: Serge Semin <fancer.lancer@gmail.com
Link: https://lore.kernel.org/r/20230427123314.1997152-2-joychakr@google.com
Signed-off-by: Mark Brown <broonie@kernel.org

diff --git a/drivers/spi/spi-dw-dma.c b/drivers/spi/spi-dw-dma.c
index ababb91..c1b42cb 100644 (file)
--- a/drivers/spi/spi-dw-dma.c
+++ b/drivers/spi/spi-dw-dma.c
@@ -208,12 +208,16 @@ static bool dw_spi_can_dma(struct spi_controller *master,
 
 static enum dma_slave_buswidth dw_spi_dma_convert_width(u8 n_bytes)
 {
-       if (n_bytes == 1)
+       switch (n_bytes) {
+       case 1:
                return DMA_SLAVE_BUSWIDTH_1_BYTE;
-       else if (n_bytes == 2)
+       case 2:
                return DMA_SLAVE_BUSWIDTH_2_BYTES;
-
-       return DMA_SLAVE_BUSWIDTH_UNDEFINED;
+       case 4:
+               return DMA_SLAVE_BUSWIDTH_4_BYTES;
+       default:
+               return DMA_SLAVE_BUSWIDTH_UNDEFINED;
+       }
 }
 
 static int dw_spi_dma_wait(struct dw_spi *dws, unsigned int len, u32 speed)