arm64: dts: mt7986: add mmc related device nodes
authorSam Shih <sam.shih@mediatek.com>
Fri, 6 Jan 2023 15:28:43 +0000 (16:28 +0100)
committerMatthias Brugger <matthias.bgg@gmail.com>
Fri, 13 Jan 2023 13:12:35 +0000 (14:12 +0100)
This patch adds mmc support for MT7986.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20230106152845.88717-4-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
arch/arm64/boot/dts/mediatek/mt7986a.dtsi

index 58089fc..c7a2ac7 100644 (file)
@@ -5,6 +5,8 @@
  */
 
 /dts-v1/;
+#include <dt-bindings/pinctrl/mt65xx.h>
+
 #include "mt7986a.dtsi"
 
 / {
                device_type = "memory";
                reg = <0 0x40000000 0 0x40000000>;
        };
+
+       reg_1p8v: regulator-1p8v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-1.8V";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reg_3p3v: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-3.3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
 };
 
 &crypto {
        };
 };
 
+&mmc0 {
+       pinctrl-names = "default", "state_uhs";
+       pinctrl-0 = <&mmc0_pins_default>;
+       pinctrl-1 = <&mmc0_pins_uhs>;
+       bus-width = <8>;
+       max-frequency = <200000000>;
+       cap-mmc-highspeed;
+       mmc-hs200-1_8v;
+       mmc-hs400-1_8v;
+       hs400-ds-delay = <0x14014>;
+       vmmc-supply = <&reg_3p3v>;
+       vqmmc-supply = <&reg_1p8v>;
+       non-removable;
+       no-sd;
+       no-sdio;
+       status = "okay";
+};
+
 &pio {
+       mmc0_pins_default: mmc0-pins {
+               mux {
+                       function = "emmc";
+                       groups = "emmc_51";
+               };
+               conf-cmd-dat {
+                       pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
+                              "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
+                              "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
+                       input-enable;
+                       drive-strength = <4>;
+                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
+               };
+               conf-clk {
+                       pins = "EMMC_CK";
+                       drive-strength = <6>;
+                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
+               };
+               conf-ds {
+                       pins = "EMMC_DSL";
+                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
+               };
+               conf-rst {
+                       pins = "EMMC_RSTB";
+                       drive-strength = <4>;
+                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
+               };
+       };
+
+       mmc0_pins_uhs: mmc0-uhs-pins {
+               mux {
+                       function = "emmc";
+                       groups = "emmc_51";
+               };
+               conf-cmd-dat {
+                       pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
+                              "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
+                              "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
+                       input-enable;
+                       drive-strength = <4>;
+                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
+               };
+               conf-clk {
+                       pins = "EMMC_CK";
+                       drive-strength = <6>;
+                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
+               };
+               conf-ds {
+                       pins = "EMMC_DSL";
+                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
+               };
+               conf-rst {
+                       pins = "EMMC_RSTB";
+                       drive-strength = <4>;
+                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
+               };
+       };
+
        spi_flash_pins: spi-flash-pins {
                mux {
                        function = "spi";
index 9ff2968..9c55244 100644 (file)
                        status = "disabled";
                };
 
+               mmc0: mmc@11230000 {
+                       compatible = "mediatek,mt7986-mmc";
+                       reg = <0 0x11230000 0 0x1000>,
+                             <0 0x11c20000 0 0x1000>;
+                       interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>,
+                                <&infracfg CLK_INFRA_MSDC_HCK_CK>,
+                                <&infracfg CLK_INFRA_MSDC_CK>,
+                                <&infracfg CLK_INFRA_MSDC_133M_CK>,
+                                <&infracfg CLK_INFRA_MSDC_66M_CK>;
+                       clock-names = "source", "hclk", "source_cg", "bus_clk",
+                                     "sys_cg";
+                       status = "disabled";
+               };
+
                usb_phy: t-phy@11e10000 {
                        compatible = "mediatek,mt7986-tphy",
                                     "mediatek,generic-tphy-v2";