[S5PC100] fix dram i/o strength offset

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

diff --git a/board/samsung/tickertape/lowlevel_init.S b/board/samsung/tickertape/lowlevel_init.S
index 294eb49..8e8c6a9 100644 (file)
--- a/board/samsung/tickertape/lowlevel_init.S
+++ b/board/samsung/tickertape/lowlevel_init.S
@@ -116,19 +116,9 @@ interrupt_pending_loop:
 
        mov     r1, #0
        str     r1, [r0]
-#endif
-       bl      mem_ctrl_asm_init
-
-#ifndef CONFIG_ONENAND_IPL
-       /* Wakeup support. Don't know if it's going to be used, untested. */
-       ldr     r0, =(S5P_OTHERS_BASE)
-       ldr     r1, [r0]
-       bic     r1, r1, #0xfffffff7
-       cmp     r1, #0x8
-       beq     wakeup_reset
 
        /* DRAM I/O Drive-Strength */
-       ldr     r0, =S5P_MP_0_BASE(0x0)
+       ldr     r0, =S5P_MP_0DRV
        ldr     r1, =0x5555
        str     r1, [r0, #S5P_MP_0_OFFSET]
        str     r1, [r0, #S5P_MP_1_OFFSET]
@@ -139,6 +129,16 @@ interrupt_pending_loop:
        str     r1, [r0, #S5P_MP_6_OFFSET]
        str     r1, [r0, #S5P_MP_7_OFFSET]
 #endif
+       bl      mem_ctrl_asm_init
+
+#ifndef CONFIG_ONENAND_IPL
+       /* Wakeup support. Don't know if it's going to be used, untested. */
+       ldr     r0, =(S5P_OTHERS_BASE)
+       ldr     r1, [r0]
+       bic     r1, r1, #0xfffffff7
+       cmp     r1, #0x8
+       beq     wakeup_reset
+#endif
 
 1:
        mov     lr, r9