}
case nir_op_iadd_sat: {
Temp src0 = get_alu_src(ctx, instr->src[0]);
- Temp src1 = as_vgpr(ctx, get_alu_src(ctx, instr->src[1]));
+ Temp src1 = get_alu_src(ctx, instr->src[1]);
+ if (dst.regClass() == s1) {
+ Temp cond = bld.sopc(aco_opcode::s_cmp_lt_i32, bld.def(s1, scc), src1, Operand::zero());
+ Temp bound = bld.sop2(aco_opcode::s_add_u32, bld.def(s1), bld.scc(bld.def(s1, scc)),
+ Operand::c32(INT32_MAX), cond);
+ Temp overflow = bld.tmp(s1);
+ Temp add =
+ bld.sop2(aco_opcode::s_add_i32, bld.def(s1), bld.scc(Definition(overflow)), src0, src1);
+ bld.sop2(aco_opcode::s_cselect_b32, Definition(dst), bound, add, bld.scc(overflow));
+ break;
+ }
+
+ src1 = as_vgpr(ctx, src1);
+
if (dst.regClass() == v2b) {
Instruction* add_instr =
bld.vop3(aco_opcode::v_add_i16, Definition(dst), src0, src1).instr;