drm/amdgpu: add Clock and Power Gating support for gc 10.3.6
authorYifan Zhang <yifan1.zhang@amd.com>
Thu, 2 Dec 2021 07:49:48 +0000 (15:49 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 17 Feb 2022 20:59:05 +0000 (15:59 -0500)
Add below supports:
GFX Coarse Grain Clock Gating(CGCG)
GFX Coarse grain light sleep/deep sleep(CGLS)
GFX Medium Grain Clock Gating(MGCG)
GFX Medium Grain light sleep/deep sleep(MGLS)
GFX Fine Grain Clock Gating(FGCG)
RLC MGLS
CP  MGLS
MMHUB Clock Gating
SDMA Clock Gating
HDP Clock Gating
ATHUB Clock Gating
IH Clock Gating
GFX Power Gating

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/nv.c

index 78a0e8882a5087591605a77b55e81ba411a9f638..681180c4bbe96c54b494541c54b6d5cb81abd9a7 100644 (file)
@@ -909,8 +909,24 @@ static int nv_common_early_init(void *handle)
                adev->external_rev_id = adev->rev_id + 0x82;
                break;
        case IP_VERSION(10, 3, 6):
-               adev->cg_flags = 0;
-               adev->pg_flags = 0;
+               adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |
+                       AMD_CG_SUPPORT_GFX_MGLS |
+                       AMD_CG_SUPPORT_GFX_CGCG |
+                       AMD_CG_SUPPORT_GFX_CGLS |
+                       AMD_CG_SUPPORT_GFX_3D_CGCG |
+                       AMD_CG_SUPPORT_GFX_3D_CGLS |
+                       AMD_CG_SUPPORT_GFX_RLC_LS |
+                       AMD_CG_SUPPORT_GFX_CP_LS |
+                       AMD_CG_SUPPORT_GFX_FGCG |
+                       AMD_CG_SUPPORT_MC_MGCG |
+                       AMD_CG_SUPPORT_MC_LS |
+                       AMD_CG_SUPPORT_SDMA_LS |
+                       AMD_CG_SUPPORT_HDP_MGCG |
+                       AMD_CG_SUPPORT_HDP_LS |
+                       AMD_CG_SUPPORT_ATHUB_MGCG |
+                       AMD_CG_SUPPORT_ATHUB_LS |
+                       AMD_CG_SUPPORT_IH_CG;
+               adev->pg_flags = AMD_PG_SUPPORT_GFX_PG;
                adev->external_rev_id = adev->rev_id + 0x01;
                break;
        case IP_VERSION(10, 3, 7):