mfd: intel_soc_pmic_crc: Add crystal_cove_charger cell to BYT cells
authorHans de Goede <hdegoede@redhat.com>
Sat, 25 Dec 2021 11:55:07 +0000 (12:55 +0100)
committerLee Jones <lee.jones@linaro.org>
Tue, 8 Mar 2022 09:44:04 +0000 (09:44 +0000)
The Crystal Cove PMIC has a pin which can be used to connect the IRQ of
an external charger IC. On some boards this is used and we need to have
a cell for this, with a driver which creates its own irqchip with
a single IRQ for the charger driver to consume.

The charger driver cannot directly consume the IRQ from the MFD level
irqchip because the PMIC has 2 levels of interrupts and the second
level interrupt status register, which is handled by the cell drivers,
needs to have the IRQ acked to avoid an IRQ storm.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20211225115509.94891-3-hdegoede@redhat.com
drivers/mfd/intel_soc_pmic_crc.c

index 574cb8f..5bb0367 100644 (file)
@@ -44,6 +44,10 @@ static const struct resource adc_resources[] = {
        DEFINE_RES_IRQ_NAMED(CRYSTAL_COVE_IRQ_ADC, "ADC"),
 };
 
+static const struct resource charger_resources[] = {
+       DEFINE_RES_IRQ_NAMED(CRYSTAL_COVE_IRQ_CHGR, "CHGR"),
+};
+
 static const struct resource gpio_resources[] = {
        DEFINE_RES_IRQ_NAMED(CRYSTAL_COVE_IRQ_GPIO, "GPIO"),
 };
@@ -70,6 +74,11 @@ static struct mfd_cell crystal_cove_byt_dev[] = {
                .resources = adc_resources,
        },
        {
+               .name = "crystal_cove_charger",
+               .num_resources = ARRAY_SIZE(charger_resources),
+               .resources = charger_resources,
+       },
+       {
                .name = "crystal_cove_gpio",
                .num_resources = ARRAY_SIZE(gpio_resources),
                .resources = gpio_resources,