arm64/mm: Add remaining ID_AA64MMFR0_PARANGE_ macros

Currently there are macros only for 48 and 52 bits parange value extracted
from the ID_AA64MMFR0.PARANGE field. This change completes the enumeration
and updates the helper id_aa64mmfr0_parange_to_phys_shift(). While here it
also defines ARM64_MIN_PARANGE_BITS as the absolute minimum shift value PA
range which could be supported on a given platform.

Cc: Marc Zyngier <maz@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: kvmarm@lists.cs.columbia.edu
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/1628744994-16623-2-git-send-email-anshuman.khandual@arm.com

diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index 9bb9d11..8633bdb 100644 (file)
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -781,13 +781,13 @@ extern int do_emulate_mrs(struct pt_regs *regs, u32 sys_reg, u32 rt);
 static inline u32 id_aa64mmfr0_parange_to_phys_shift(int parange)
 {
        switch (parange) {
-       case 0: return 32;
-       case 1: return 36;
-       case 2: return 40;
-       case 3: return 42;
-       case 4: return 44;
-       case 5: return 48;
-       case 6: return 52;
+       case ID_AA64MMFR0_PARANGE_32: return 32;
+       case ID_AA64MMFR0_PARANGE_36: return 36;
+       case ID_AA64MMFR0_PARANGE_40: return 40;
+       case ID_AA64MMFR0_PARANGE_42: return 42;
+       case ID_AA64MMFR0_PARANGE_44: return 44;
+       case ID_AA64MMFR0_PARANGE_48: return 48;
+       case ID_AA64MMFR0_PARANGE_52: return 52;
        /*
         * A future PE could use a value unknown to the kernel.
         * However, by the "D10.1.4 Principles of the ID scheme

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 943d31d..1972e4b 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -853,9 +853,16 @@
 #define ID_AA64MMFR0_TGRAN64_SUPPORTED 0x0
 #define ID_AA64MMFR0_TGRAN16_NI                0x0
 #define ID_AA64MMFR0_TGRAN16_SUPPORTED 0x1
+#define ID_AA64MMFR0_PARANGE_32                0x0
+#define ID_AA64MMFR0_PARANGE_36                0x1
+#define ID_AA64MMFR0_PARANGE_40                0x2
+#define ID_AA64MMFR0_PARANGE_42                0x3
+#define ID_AA64MMFR0_PARANGE_44                0x4
 #define ID_AA64MMFR0_PARANGE_48                0x5
 #define ID_AA64MMFR0_PARANGE_52                0x6
 
+#define ARM64_MIN_PARANGE_BITS         32
+
 #define ID_AA64MMFR0_TGRAN_2_SUPPORTED_DEFAULT 0x0
 #define ID_AA64MMFR0_TGRAN_2_SUPPORTED_NONE    0x1
 #define ID_AA64MMFR0_TGRAN_2_SUPPORTED_MIN     0x2