drm/panel-samsung-sofef00: Drop custom DSI write macro
authorJavier Martinez Canillas <javierm@redhat.com>
Sat, 7 Jan 2023 19:18:18 +0000 (20:18 +0100)
committerJavier Martinez Canillas <javierm@redhat.com>
Wed, 11 Jan 2023 17:50:53 +0000 (18:50 +0100)
There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
that instead and delete the custom DSI write macro defined in the driver.

Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230107191822.3787147-10-javierm@redhat.com
drivers/gpu/drm/panel/panel-samsung-sofef00.c

index 1a0d24595faa540eeda78517a0f3ab7e2abcd8e5..9db49a028930e441efc067d416e190552ead7ed7 100644 (file)
@@ -34,14 +34,6 @@ struct sofef00_panel *to_sofef00_panel(struct drm_panel *panel)
        return container_of(panel, struct sofef00_panel, panel);
 }
 
-#define dsi_dcs_write_seq(dsi, seq...) do {                            \
-               static const u8 d[] = { seq };                          \
-               int ret;                                                \
-               ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
-               if (ret < 0)                                            \
-                       return ret;                                     \
-       } while (0)
-
 static void sofef00_panel_reset(struct sofef00_panel *ctx)
 {
        gpiod_set_value_cansleep(ctx->reset_gpio, 0);
@@ -67,7 +59,7 @@ static int sofef00_panel_on(struct sofef00_panel *ctx)
        }
        usleep_range(10000, 11000);
 
-       dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);
+       mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);
 
        ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
        if (ret < 0) {
@@ -75,13 +67,13 @@ static int sofef00_panel_on(struct sofef00_panel *ctx)
                return ret;
        }
 
-       dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);
-       dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);
-       dsi_dcs_write_seq(dsi, 0xb0, 0x07);
-       dsi_dcs_write_seq(dsi, 0xb6, 0x12);
-       dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);
-       dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);
-       dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
+       mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);
+       mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a);
+       mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x07);
+       mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x12);
+       mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5);
+       mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);
+       mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
 
        ret = mipi_dsi_dcs_set_display_on(dsi);
        if (ret < 0) {