hdmirx: revert audio fifo reset alternatively
authorHang Cheng <hang.cheng@amlogic.com>
Thu, 12 Apr 2018 02:59:26 +0000 (10:59 +0800)
committerYixun Lan <yixun.lan@amlogic.com>
Mon, 16 Apr 2018 05:10:25 +0000 (21:10 -0800)
PD#154135: hdmirx: revert audio fifo reset alternatively

MIK-8267R device outputs 4 channel audio of pcm, which
txlx doesn't support. So revert this workaround and
avoid side effect.

Change-Id: Id969f27ed44567c9bcb6bfd8e77d8ff33d70b0f6
Signed-off-by: Hang Cheng <hang.cheng@amlogic.com>
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.h
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_hw.c

index 396b122..736e5d1 100644 (file)
@@ -41,7 +41,7 @@
  *
  *
  */
-#define RX_VER1 "ver.2018/03/20"
+#define RX_VER1 "ver.2018/04/12"
 
 
 
index 6e6dbcf..70f4189 100644 (file)
@@ -843,25 +843,11 @@ bool is_clk_stable(void)
 unsigned int hdmirx_audio_fifo_rst(void)
 {
        int error = 0;
-       static bool rst_flag;
 
-       /* for some special devices which send many unvalid subpackets
-        * in low sample rate audio pattern(e.g 32K), if we only store
-        * subpackets with sample_present.spX=1, afifo will always
-        * underflow. In this case, config afifo to store all subpackets
-        * regardless of sample_present.spX
-        */
-       if (rst_flag) {
-               hdmirx_wr_dwc(DWC_AUD_FIFO_CTRL, AFIF_SUBPACKETS | AFIF_INIT);
-               udelay(20);
-               hdmirx_wr_dwc(DWC_AUD_FIFO_CTRL, AFIF_SUBPACKETS);
-       } else {
-               hdmirx_wr_dwc(DWC_AUD_FIFO_CTRL, AFIF_INIT);
-               udelay(20);
-               hdmirx_wr_dwc(DWC_AUD_FIFO_CTRL, 0);
-       }
+       hdmirx_wr_bits_dwc(DWC_AUD_FIFO_CTRL, AFIF_INIT, 1);
+       udelay(20);
+       hdmirx_wr_bits_dwc(DWC_AUD_FIFO_CTRL, AFIF_INIT, 0);
        hdmirx_wr_dwc(DWC_DMI_SW_RST, 0x10);
-       rst_flag = !rst_flag;
        if (log_level & AUDIO_LOG)
                rx_pr("%s\n", __func__);
        return error;