ARM: perf: add devicetree bindings for 11MPcore, A5, A7 and A15 PMUs
authorWill Deacon <will.deacon@arm.com>
Sat, 28 Jul 2012 15:05:55 +0000 (16:05 +0100)
committerWill Deacon <will.deacon@arm.com>
Thu, 23 Aug 2012 10:35:51 +0000 (11:35 +0100)
This patch adds separate devicetree bindings for 11MPcore and
Cortex-{A5,A7,A15} PMUs in preparation for improved devicetree parsing
in the ARM perf-event CPU PMU driver.

Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Documentation/devicetree/bindings/arm/pmu.txt
arch/arm/kernel/perf_event.c

index 1c044eb..343781b 100644 (file)
@@ -7,8 +7,12 @@ representation in the device tree should be done as under:-
 Required properties:
 
 - compatible : should be one of
+       "arm,cortex-a15-pmu"
        "arm,cortex-a9-pmu"
        "arm,cortex-a8-pmu"
+       "arm,cortex-a7-pmu"
+       "arm,cortex-a5-pmu"
+       "arm,arm11mpcore-pmu"
        "arm,arm1176-pmu"
        "arm,arm1136-pmu"
 - interrupts : 1 combined interrupt or 1 per core.
index c44647e..3aa3388 100644 (file)
@@ -646,10 +646,14 @@ arch_initcall(cpu_pmu_reset);
  * PMU platform driver and devicetree bindings.
  */
 static struct of_device_id armpmu_of_device_ids[] = {
+       {.compatible = "arm,cortex-a15-pmu"},
        {.compatible = "arm,cortex-a9-pmu"},
        {.compatible = "arm,cortex-a8-pmu"},
-       {.compatible = "arm,arm1136-pmu"},
+       {.compatible = "arm,cortex-a7-pmu"},
+       {.compatible = "arm,cortex-a5-pmu"},
+       {.compatible = "arm,arm11mpcore-pmu"},
        {.compatible = "arm,arm1176-pmu"},
+       {.compatible = "arm,arm1136-pmu"},
        {},
 };