drm/i915: parse eDP panel color depth from VBT block

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5f781a7..2c16694 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -283,6 +283,7 @@ typedef struct drm_i915_private {
        unsigned int lvds_use_ssc:1;
        unsigned int edp_support:1;
        int lvds_ssc_freq;
+       int edp_bpp;
 
        struct notifier_block lid_notifier;
 

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index b53c46f..15fbc1b 100644 (file)
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -33,6 +33,8 @@
 #define        SLAVE_ADDR1     0x70
 #define        SLAVE_ADDR2     0x72
 
+static int panel_type;
+
 static void *
 find_section(struct bdb_header *bdb, int section_id)
 {
@@ -128,6 +130,7 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,
        dev_priv->lvds_dither = lvds_options->pixel_dither;
        if (lvds_options->panel_type == 0xff)
                return;
+       panel_type = lvds_options->panel_type;
 
        lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
        if (!lvds_lfp_data)
@@ -406,6 +409,34 @@ parse_driver_features(struct drm_i915_private *dev_priv,
 }
 
 static void
+parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
+{
+       struct bdb_edp *edp;
+
+       edp = find_section(bdb, BDB_EDP);
+       if (!edp) {
+               if (SUPPORTS_EDP(dev_priv->dev) && dev_priv->edp_support) {
+                       DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported,\
+                                      assume 18bpp panel color depth.\n");
+                       dev_priv->edp_bpp = 18;
+               }
+               return;
+       }
+
+       switch ((edp->color_depth >> (panel_type * 2)) & 3) {
+       case EDP_18BPP:
+               dev_priv->edp_bpp = 18;
+               break;
+       case EDP_24BPP:
+               dev_priv->edp_bpp = 24;
+               break;
+       case EDP_30BPP:
+               dev_priv->edp_bpp = 30;
+               break;
+       }
+}
+
+static void
 parse_device_mapping(struct drm_i915_private *dev_priv,
                       struct bdb_header *bdb)
 {
@@ -522,6 +553,7 @@ intel_init_bios(struct drm_device *dev)
        parse_sdvo_device_mapping(dev_priv, bdb);
        parse_device_mapping(dev_priv, bdb);
        parse_driver_features(dev_priv, bdb);
+       parse_edp(dev_priv, bdb);
 
        pci_unmap_rom(pdev, bios);
 

diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index 425ac9d..4c18514 100644 (file)
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -98,6 +98,7 @@ struct vbios_data {
 #define BDB_SDVO_LVDS_PNP_IDS   24
 #define BDB_SDVO_LVDS_POWER_SEQ         25
 #define BDB_TV_OPTIONS          26
+#define BDB_EDP                         27
 #define BDB_LVDS_OPTIONS        40
 #define BDB_LVDS_LFP_DATA_PTRS  41
 #define BDB_LVDS_LFP_DATA       42
@@ -426,6 +427,45 @@ struct bdb_driver_features {
        u8 custom_vbt_version;
 } __attribute__((packed));
 
+#define EDP_18BPP      0
+#define EDP_24BPP      1
+#define EDP_30BPP      2
+#define EDP_RATE_1_62  0
+#define EDP_RATE_2_7   1
+#define EDP_LANE_1     0
+#define EDP_LANE_2     1
+#define EDP_LANE_4     3
+#define EDP_PREEMPHASIS_NONE   0
+#define EDP_PREEMPHASIS_3_5dB  1
+#define EDP_PREEMPHASIS_6dB    2
+#define EDP_PREEMPHASIS_9_5dB  3
+#define EDP_VSWING_0_4V                0
+#define EDP_VSWING_0_6V                1
+#define EDP_VSWING_0_8V                2
+#define EDP_VSWING_1_2V                3
+
+struct edp_power_seq {
+       u16 t3;
+       u16 t7;
+       u16 t9;
+       u16 t10;
+       u16 t12;
+} __attribute__ ((packed));
+
+struct edp_link_params {
+       u8 rate:4;
+       u8 lanes:4;
+       u8 preemphasis:4;
+       u8 vswing:4;
+} __attribute__ ((packed));
+
+struct bdb_edp {
+       struct edp_power_seq power_seqs[16];
+       u32 color_depth;
+       u32 sdrrs_msa_timing_delay;
+       struct edp_link_params link_params[16];
+} __attribute__ ((packed));
+
 bool intel_init_bios(struct drm_device *dev);
 
 /*