arm: dts: ls1028a-rdb: sort nodes alphabetically
authorVladimir Oltean <vladimir.oltean@nxp.com>
Mon, 3 Jan 2022 12:47:31 +0000 (14:47 +0200)
committerPriyanka Jain <priyanka.jain@nxp.com>
Tue, 1 Feb 2022 09:38:07 +0000 (15:08 +0530)
The nodes in the NXP LS1028A-RDB device tree are out of order, regroup
them alphabetically to have a simple delta when the Linux device tree is
brought in.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
arch/arm/dts/fsl-ls1028a-rdb.dts

index ddb01db..11bf7e5 100644 (file)
        status = "okay";
 };
 
+&duart0 {
+       status = "okay";
+};
+
+&duart1 {
+       status = "okay";
+};
+
+&enetc_mdio_pf3 {
+       status = "okay";
+       rdb_phy0: phy@2 {
+               reg = <2>;
+       };
+
+       /* VSC8514 QSGMII PHY */
+       sw_phy0: phy@10 {
+               reg = <0x10>;
+       };
+
+       sw_phy1: phy@11 {
+               reg = <0x11>;
+       };
+
+       sw_phy2: phy@12 {
+               reg = <0x12>;
+       };
+
+       sw_phy3: phy@13 {
+               reg = <0x13>;
+       };
+};
+
+&enetc_port0 {
+       status = "okay";
+       phy-mode = "sgmii";
+       phy-handle = <&rdb_phy0>;
+};
+
+&enetc_port2 {
+       status = "okay";
+};
+
 &esdhc {
        status = "okay";
 };
        status = "okay";
 };
 
-&sata {
-       status = "okay";
-};
-
-&duart0 {
-       status = "okay";
-};
-
-&duart1 {
-       status = "okay";
-};
-
-&pcie1 {
-       status = "okay";
-};
-
-&pcie2 {
-       status = "okay";
-};
-
-&usb0 {
-       status = "okay";
-};
-
-&usb1 {
-       status = "okay";
-};
-
-&enetc_port0 {
-       status = "okay";
-       phy-mode = "sgmii";
-       phy-handle = <&rdb_phy0>;
-};
-
-&enetc_port2 {
-       status = "okay";
-};
-
 &mscc_felix {
        status = "okay";
 };
        status = "okay";
 };
 
-&enetc_mdio_pf3 {
+&pcie1 {
        status = "okay";
-       rdb_phy0: phy@2 {
-               reg = <2>;
-       };
+};
 
-       /* VSC8514 QSGMII PHY */
-       sw_phy0: phy@10 {
-               reg = <0x10>;
-       };
+&pcie2 {
+       status = "okay";
+};
 
-       sw_phy1: phy@11 {
-               reg = <0x11>;
-       };
+&sata {
+       status = "okay";
+};
 
-       sw_phy2: phy@12 {
-               reg = <0x12>;
-       };
+&usb0 {
+       status = "okay";
+};
 
-       sw_phy3: phy@13 {
-               reg = <0x13>;
-       };
+&usb1 {
+       status = "okay";
 };