WL_TRACE("wl%d: wlc_setband_inact\n", wlc_hw->unit);
- ASSERT(bandunit != wlc_hw->band->bandunit);
- ASSERT(ai_iscoreup(wlc_hw->sih));
- ASSERT((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) ==
- 0);
+ WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
/* disable interrupts */
macintmask = wl_intrsoff(wlc->wl);
/* radio off */
wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
- ASSERT(wlc_hw->clk);
-
wlc_bmac_core_phy_clk(wlc_hw, OFF);
wlc_setxband(wlc_hw, bandunit);
WL_TRACE("wl%d: wlc_dpc: macintstatus 0x%x\n",
wlc_hw->unit, macintstatus);
- if (macintstatus & MI_PRQ) {
- /* Process probe request FIFO */
- ASSERT(0 && "PRQ Interrupt in non-MBSS");
- }
+ WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */
/* BCN template is available */
/* ZZZ: Use AP_ACTIVE ? */
if (!pktq_empty(&wlc->active_queue->q))
wlc_send_q(wlc, wlc->active_queue);
- ASSERT(wlc_ps_check(wlc));
-
- /* make sure the bound indication and the implementation are in sync */
- ASSERT(bounded == true || wlc->macintstatus == 0);
-
/* it isn't done and needs to be resched if macintstatus is non-zero */
return wlc->macintstatus != 0;
wlc_hw->machwcap_backup = wlc_hw->machwcap;
/* init tx fifo size */
- ASSERT((wlc_hw->corerev - XMTFIFOTBL_STARTREV) <
- ARRAY_SIZE(xmtfifo_sz));
wlc_hw->xmtfifo_sz =
xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)];
WL_TRACE("wl%d: %s:\n", wlc_hw->unit, __func__);
- ASSERT(wlc_hw->wlc->pub->hw_up && wlc_hw->wlc->macintmask == 0);
-
/*
* Enable pll and xtal, initialize the power control registers,
* and force fastclock for the remainder of wlc_up().
if (wlc_hw->sih->bustype == PCI_BUS)
si_pci_setup(wlc_hw->sih, coremask);
- ASSERT(si_coreid(wlc_hw->sih) == D11_CORE_ID);
-
/*
* Need to read the hwradio status here to cover the case where the system
* is loaded with the hw radio disabled. We do not want to bring the driver up in this case.
/* FULLY enable dynamic power control and d11 core interrupt */
wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC);
- ASSERT(wlc_hw->wlc->macintmask == 0);
wl_intrson(wlc_hw->wlc->wl);
return 0;
}
/* wait until ucode is no longer asleep */
SPINWAIT((wlc_bmac_read_shm(wlc_hw, M_UCODE_DBGST) ==
DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly);
-
- ASSERT(wlc_bmac_read_shm(wlc_hw, M_UCODE_DBGST) != DBGST_ASLEEP);
}
void wlc_bmac_hw_etheraddr(struct wlc_hw_info *wlc_hw, u8 *ea)
(&wlc_hw->regs->
clk_ctl_st) & CCS_HTAVAIL) == 0),
PMU_MAX_TRANSITION_DLY);
- ASSERT(R_REG
- (&wlc_hw->regs->
- clk_ctl_st) & CCS_HTAVAIL);
+ WARN_ON(!(R_REG
+ (&wlc_hw->regs->
+ clk_ctl_st) & CCS_HTAVAIL));
} else {
if ((wlc_hw->sih->pmurev == 0) &&
(R_REG
/* check fast clock is available (if core is not in reset) */
if (wlc_hw->forcefastclk && wlc_hw->clk)
- ASSERT(ai_core_sflags(wlc_hw->sih, 0, 0) & SISF_FCLKA);
+ WARN_ON(!(ai_core_sflags(wlc_hw->sih, 0, 0) &
+ SISF_FCLKA));
/* keep the ucode wake bit on if forcefastclk is on
* since we do not want ucode to put us back to slow clock
};
struct wlc_hwband *band;
- ASSERT((val & ~mask) == 0);
- ASSERT(idx < MHFMAX);
+ if ((val & ~mask) || idx >= MHFMAX)
+ return; /* error condition */
switch (bands) {
/* Current band only or all bands,
band = wlc_hw->bandstate[BAND_2G_INDEX];
break;
default:
- ASSERT(0);
- band = NULL;
+ band = NULL; /* error condition */
}
if (band) {
u16 wlc_bmac_mhf_get(struct wlc_hw_info *wlc_hw, u8 idx, int bands)
{
struct wlc_hwband *band;
- ASSERT(idx < MHFMAX);
+ if (idx >= MHFMAX)
+ return 0; /* error condition */
switch (bands) {
case WLC_BAND_AUTO:
band = wlc_hw->band;
band = wlc_hw->bandstate[BAND_2G_INDEX];
break;
default:
- ASSERT(0);
- band = NULL;
+ band = NULL; /* error condition */
}
if (!band)
u32 maccontrol;
u32 new_maccontrol;
- ASSERT((val & ~mask) == 0);
-
+ if (val & ~mask)
+ return; /* error condition */
maccontrol = wlc_hw->maccontrol;
new_maccontrol = (maccontrol & ~mask) | val;
void wlc_ucode_wake_override_set(struct wlc_hw_info *wlc_hw, u32 override_bit)
{
- ASSERT((wlc_hw->wake_override & override_bit) == 0);
-
if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) {
mboolset(wlc_hw->wake_override, override_bit);
return;
void wlc_ucode_wake_override_clear(struct wlc_hw_info *wlc_hw, u32 override_bit)
{
- ASSERT(wlc_hw->wake_override & override_bit);
-
mboolclr(wlc_hw->wake_override, override_bit);
if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE))
WL_TRACE("wl%d: wlc_bmac_set_addrmatch\n", wlc_hw->unit);
- ASSERT(match_reg_offset < RCM_SIZE);
-
regs = wlc_hw->regs;
mac_l = addr[0] | (addr[1] << 8);
mac_m = addr[2] | (addr[3] << 8);
WL_TRACE("wl%d: wlc_bmac_write_template_ram\n", wlc_hw->unit);
regs = wlc_hw->regs;
-
- ASSERT(IS_ALIGNED(offset, sizeof(u32)));
- ASSERT(IS_ALIGNED(len, sizeof(u32)));
- ASSERT((offset & ~0xffff) == 0);
-
W_REG(®s->tplatewrptr, offset);
/* if MCTL_BIGEND bit set in mac control register,
wlc_phy_bw_state_set(wlc_hw->band->pi, bw);
- ASSERT(wlc_hw->clk);
-
wlc_bmac_phy_reset(wlc_hw);
wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi));
wlc_bmac_write_template_ram(wlc_hw, T_BCN0_TPL_BASE, (len + 3) & ~3,
bcn);
/* write beacon length to SCR */
- ASSERT(len < 65536);
wlc_bmac_write_shm(wlc_hw, M_BCN0_FRM_BYTESZ, (u16) len);
/* mark beacon0 valid */
OR_REG(®s->maccommand, MCMD_BCN0VLD);
wlc_bmac_write_template_ram(wlc_hw, T_BCN1_TPL_BASE, (len + 3) & ~3,
bcn);
/* write beacon length to SCR */
- ASSERT(len < 65536);
wlc_bmac_write_shm(wlc_hw, M_BCN1_FRM_BYTESZ, (u16) len);
/* mark beacon1 valid */
OR_REG(®s->maccommand, MCMD_BCN1VLD);
else if (!
(R_REG(®s->maccommand) & MCMD_BCN1VLD))
wlc_write_hw_bcntemplate1(wlc_hw, bcn, len);
- else /* one template should always have been available */
- ASSERT(0);
}
}
WL_TRACE("wl%d: wlc_bmac_bsinit: bandunit %d\n",
wlc_hw->unit, wlc_hw->band->bandunit);
- /* sanity check */
- if (PHY_TYPE(R_REG(&wlc_hw->regs->phyversion)) !=
- PHY_TYPE_LCNXN)
- ASSERT((uint)
- PHY_TYPE(R_REG(&wlc_hw->regs->phyversion))
- == wlc_hw->band->phytype);
-
wlc_ucode_bsinit(wlc_hw);
wlc_phy_init(wlc_hw->band->pi, chanspec);
struct wlc_info *wlc = wlc_hw->wlc;
u32 macintmask;
- ASSERT(NBANDS_HW(wlc_hw) > 1);
- ASSERT(bandunit != wlc_hw->band->bandunit);
-
/* Enable the d11 core before accessing it */
if (!ai_iscoreup(wlc_hw->sih)) {
ai_core_reset(wlc_hw->sih, 0, 0);
- ASSERT(ai_iscoreup(wlc_hw->sih));
wlc_mctrl_reset(wlc_hw);
}
wl_intrsrestore(wlc->wl, macintmask);
/* ucode should still be suspended.. */
- ASSERT((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) ==
- 0);
+ WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
}
/* low-level band switch utility routine */
wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d"
" driver size %d index %d\n", buf[i],
wlc_hw->xmtfifo_sz[i], i);
- ASSERT(0);
}
/* make sure we can still talk to the mac */
- ASSERT(R_REG(®s->maccontrol) != 0xffffffff);
+ WARN_ON(R_REG(®s->maccontrol) == 0xffffffff);
/* band-specific inits done by wlc_bsinit() */
wlc_phy_antsel_init(wlc_hw->band->pi, false);
} else if (wlc_hw->antsel_type == ANTSEL_2x4) {
- ASSERT((gm & BOARD_GPIO_12) == 0);
gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
/*
* The board itself is powered by these GPIOs
WL_TRACE("wl%d: wlc_ucode_write\n", wlc_hw->unit);
- ASSERT(IS_ALIGNED(nbytes, sizeof(u32)));
-
count = (nbytes / sizeof(u32));
W_REG(®s->objaddr, (OBJADDR_AUTO_INC | OBJADDR_UCM_SEL));
base = (volatile u8 *)wlc_hw->regs;
for (i = 0; inits[i].addr != 0xffff; i++) {
- ASSERT((inits[i].size == 2) || (inits[i].size == 4));
-
if (inits[i].size == 2)
W_REG((u16 *)(base + inits[i].addr),
inits[i].value);
void wlc_intrson(struct wlc_info *wlc)
{
struct wlc_hw_info *wlc_hw = wlc->hw;
- ASSERT(wlc->defmacintmask);
wlc->macintmask = wlc->defmacintmask;
W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
}
{
u32 macintstatus;
- ASSERT(wlc->macintstatus != 0);
-
/* read and clear macintstatus and intstatus registers */
macintstatus = wlc_intstatus(wlc, false);
*wantdpc = true;
/* save interrupt status bits */
- ASSERT(wlc->macintstatus == 0);
wlc->macintstatus = macintstatus;
return true;
if (s1 == 0xffffffff) {
wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n",
wlc_hw->unit, __func__);
- ASSERT(s1 != 0xffffffff);
return morepending;
}
wl_down(wlc->wl);
return;
}
- ASSERT(!(mc & MCTL_PSM_JMP_0));
- ASSERT(mc & MCTL_PSM_RUN);
- ASSERT(mc & MCTL_EN_MAC);
+ WARN_ON(mc & MCTL_PSM_JMP_0);
+ WARN_ON(!(mc & MCTL_PSM_RUN));
+ WARN_ON(!(mc & MCTL_EN_MAC));
mi = R_REG(®s->macintstatus);
if (mi == 0xffffffff) {
wl_down(wlc->wl);
return;
}
- ASSERT(!(mi & MI_MACSSPNDD));
+ WARN_ON(mi & MI_MACSSPNDD);
wlc_bmac_mctrl(wlc_hw, MCTL_EN_MAC, 0);
wl_down(wlc->wl);
return;
}
- ASSERT(!(mc & MCTL_PSM_JMP_0));
- ASSERT(mc & MCTL_PSM_RUN);
- ASSERT(!(mc & MCTL_EN_MAC));
+ WARN_ON(mc & MCTL_PSM_JMP_0);
+ WARN_ON(!(mc & MCTL_PSM_RUN));
+ WARN_ON(mc & MCTL_EN_MAC);
}
void wlc_enable_mac(struct wlc_info *wlc)
/*
* Track overlapping suspend requests
*/
- ASSERT(wlc_hw->mac_suspend_depth > 0);
wlc_hw->mac_suspend_depth--;
if (wlc_hw->mac_suspend_depth > 0)
return;
mc = R_REG(®s->maccontrol);
- ASSERT(!(mc & MCTL_PSM_JMP_0));
- ASSERT(!(mc & MCTL_EN_MAC));
- ASSERT(mc & MCTL_PSM_RUN);
+ WARN_ON(mc & MCTL_PSM_JMP_0);
+ WARN_ON(mc & MCTL_EN_MAC);
+ WARN_ON(!(mc & MCTL_PSM_RUN));
wlc_bmac_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC);
W_REG(®s->macintstatus, MI_MACSSPNDD);
mc = R_REG(®s->maccontrol);
- ASSERT(!(mc & MCTL_PSM_JMP_0));
- ASSERT(mc & MCTL_EN_MAC);
- ASSERT(mc & MCTL_PSM_RUN);
+ WARN_ON(mc & MCTL_PSM_JMP_0);
+ WARN_ON(!(mc & MCTL_EN_MAC));
+ WARN_ON(!(mc & MCTL_PSM_RUN));
mi = R_REG(®s->macintstatus);
- ASSERT(!(mi & MI_MACSSPNDD));
+ WARN_ON(mi & MI_MACSSPNDD);
wlc_ucode_wake_override_clear(wlc_hw, WLC_WAKE_OVERRIDE_MACSUSPEND);
}
(CCS_ERSRC_AVAIL_HT)) {
wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY"
" PLL failed\n", __func__);
- ASSERT(0);
}
} else {
OR_REG(®s->clk_ctl_st,
(CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL)) {
wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on "
"PHY PLL failed\n", __func__);
- ASSERT(0);
}
}
} else {
WL_TRACE("wl%d: %s\n", wlc_hw->unit, __func__);
- ASSERT(!wlc_hw->up);
-
dev_gone = DEVICEREMOVED(wlc_hw->wlc);
if (dev_gone)
{
int i;
- /* offset and len need to be even */
- ASSERT((offset & 1) == 0);
- ASSERT((len & 1) == 0);
-
- if (len <= 0)
+ if (len <= 0 || (offset & 1) || (len & 1))
return;
for (i = 0; i < len; i += 2) {
volatile u16 *objdata_hi = objdata_lo + 1;
u16 v;
- ASSERT((offset & 1) == 0);
-
W_REG(®s->objaddr, sel | (offset >> 2));
(void)R_REG(®s->objaddr);
if (offset & 2) {
volatile u16 *objdata_lo = (volatile u16 *)®s->objdata;
volatile u16 *objdata_hi = objdata_lo + 1;
- ASSERT((offset & 1) == 0);
-
W_REG(®s->objaddr, sel | (offset >> 2));
(void)R_REG(®s->objaddr);
if (offset & 2) {
const u8 *p = (const u8 *)buf;
int i;
- /* offset and len need to be even */
- ASSERT((offset & 1) == 0);
- ASSERT((len & 1) == 0);
-
- if (len <= 0)
+ if (len <= 0 || (offset & 1) || (len & 1))
return;
for (i = 0; i < len; i += 2) {
u8 *p = (u8 *) buf;
int i;
- /* offset and len need to be even */
- ASSERT((offset & 1) == 0);
- ASSERT((len & 1) == 0);
-
- if (len <= 0)
+ if (len <= 0 || (offset & 1) || (len & 1))
return;
for (i = 0; i < len; i += 2) {
void wlc_bmac_pllreq(struct wlc_hw_info *wlc_hw, bool set, mbool req_bit)
{
- ASSERT(req_bit);
-
if (set) {
if (mboolisset(wlc_hw->pllreq, req_bit))
return;
projects / platform / upstream / kernel-adaptation-pc.git / commitdiff