/* if fifo only has one byte, it is not safe */
if ((dev->status & STATUS_WRITE_IN_PROGRESS) &&
(dw_readl(dev, DW_IC_TXFLR) < 1)) {
- dev_err(dev->dev, "TX FIFO overrun, addr: 0x%x.\n", addr);
+ dev_err(dev->dev, "TX FIFO underrun, addr: 0x%x.\n", addr);
dev->msg_err = -EAGAIN;
}
[medfield_0] = {
.bus_num = 0,
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
- .tx_fifo_depth = 32,
- .rx_fifo_depth = 32,
+ .tx_fifo_depth = 256,
+ .rx_fifo_depth = 256,
.clk_khz = 17000,
.scl_cfg = mfld_i2c_scl_cfg,
},
[medfield_1] = {
.bus_num = 1,
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD,
- .tx_fifo_depth = 32,
- .rx_fifo_depth = 32,
+ .tx_fifo_depth = 256,
+ .rx_fifo_depth = 256,
.clk_khz = 20500,
.scl_cfg = mfld_i2c_scl_cfg,
},
[medfield_2] = {
.bus_num = 2,
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
- .tx_fifo_depth = 32,
- .rx_fifo_depth = 32,
+ .tx_fifo_depth = 256,
+ .rx_fifo_depth = 256,
.clk_khz = 17000,
.scl_cfg = mfld_i2c_scl_cfg,
},
[medfield_3] = {
.bus_num = 3,
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD,
- .tx_fifo_depth = 32,
- .rx_fifo_depth = 32,
+ .tx_fifo_depth = 256,
+ .rx_fifo_depth = 256,
.clk_khz = 20500,
.scl_cfg = mfld_i2c_scl_cfg,
},
[medfield_4] = {
.bus_num = 4,
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
- .tx_fifo_depth = 32,
- .rx_fifo_depth = 32,
+ .tx_fifo_depth = 256,
+ .rx_fifo_depth = 256,
.clk_khz = 17000,
.scl_cfg = mfld_i2c_scl_cfg,
},
[medfield_5] = {
.bus_num = 5,
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
- .tx_fifo_depth = 32,
- .rx_fifo_depth = 32,
+ .tx_fifo_depth = 256,
+ .rx_fifo_depth = 256,
.clk_khz = 17000,
.scl_cfg = mfld_i2c_scl_cfg,
},
[cloverview_0] = {
.bus_num = 0,
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
- .tx_fifo_depth = 32,
- .rx_fifo_depth = 32,
+ .tx_fifo_depth = 256,
+ .rx_fifo_depth = 256,
.clk_khz = 17000,
.scl_cfg = ctp_i2c_scl_cfg,
},
[cloverview_1] = {
.bus_num = 1,
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
- .tx_fifo_depth = 32,
- .rx_fifo_depth = 32,
+ .tx_fifo_depth = 256,
+ .rx_fifo_depth = 256,
.clk_khz = 17000,
.scl_cfg = ctp_i2c_scl_cfg,
},
[cloverview_2] = {
.bus_num = 2,
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
- .tx_fifo_depth = 32,
- .rx_fifo_depth = 32,
+ .tx_fifo_depth = 256,
+ .rx_fifo_depth = 256,
.clk_khz = 17000,
.scl_cfg = ctp_i2c_scl_cfg,
},
[cloverview_3] = {
.bus_num = 3,
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD,
- .tx_fifo_depth = 32,
- .rx_fifo_depth = 32,
+ .tx_fifo_depth = 256,
+ .rx_fifo_depth = 256,
.clk_khz = 20500,
.scl_cfg = ctp_i2c_scl_cfg,
},
[cloverview_4] = {
.bus_num = 4,
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
- .tx_fifo_depth = 32,
- .rx_fifo_depth = 32,
+ .tx_fifo_depth = 256,
+ .rx_fifo_depth = 256,
.clk_khz = 17000,
.scl_cfg = ctp_i2c_scl_cfg,
},
[cloverview_5] = {
.bus_num = 5,
.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
- .tx_fifo_depth = 32,
- .rx_fifo_depth = 32,
+ .tx_fifo_depth = 256,
+ .rx_fifo_depth = 256,
.clk_khz = 17000,
.scl_cfg = ctp_i2c_scl_cfg,
},