[AArch64] Wire up Cortex-A57 rtx costs.

	* config/aarch64/aarch64-cores.def (cortex-a57): Use cortexa57
	tuning struct.
	(cortex-a57.cortex-a53): Likewise.
	* config/aarch64/aarch64.c (cortexa57_tunings): New tuning struct.

From-SVN: r207693

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b8e3ef8..f29f943 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,12 @@
 2014-02-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
+       * config/aarch64/aarch64-cores.def (cortex-a57): Use cortexa57
+       tuning struct.
+       (cortex-a57.cortex-a53): Likewise.
+       * config/aarch64/aarch64.c (cortexa57_tunings): New tuning struct.
+
+2014-02-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
        * config/arm/thumb2.md (*thumb2_movhi_insn): Add alternatives for
        arm_restrict_it.
 

diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
index 1039660..9319249 100644 (file)
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -35,8 +35,8 @@
 /* V8 Architecture Processors.  */
 
 AARCH64_CORE("cortex-a53",  cortexa53, cortexa53, 8,  AARCH64_FL_FPSIMD | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa53)
-AARCH64_CORE("cortex-a57",  cortexa15, cortexa15, 8,  AARCH64_FL_FPSIMD | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, generic)
+AARCH64_CORE("cortex-a57",  cortexa15, cortexa15, 8,  AARCH64_FL_FPSIMD | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa57)
 
 /* V8 big.LITTLE implementations.  */
 
-AARCH64_CORE("cortex-a57.cortex-a53",  cortexa57cortexa53, cortexa53, 8,  AARCH64_FL_FPSIMD | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, generic)
+AARCH64_CORE("cortex-a57.cortex-a53",  cortexa57cortexa53, cortexa53, 8,  AARCH64_FL_FPSIMD | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa57)

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 784bfa3..ea90311 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -235,6 +235,16 @@ static const struct tune_params cortexa53_tunings =
   NAMED_PARAM (issue_rate, 2)
 };
 
+static const struct tune_params cortexa57_tunings =
+{
+  &cortexa57_extra_costs,
+  &generic_addrcost_table,
+  &generic_regmove_cost,
+  &generic_vector_cost,
+  NAMED_PARAM (memmov_cost, 4),
+  NAMED_PARAM (issue_rate, 3)
+};
+
 /* A processor implementing AArch64.  */
 struct processor
 {