intel_scu_ipc: add cloverview support

BZ: 16713

Cloverview SOC use different PCI Device ID for IPC hence existing IPC
driver won't be successfully probed on Cloverview SOC.

Clovertrail Phone is using Avondale Cove PMIC (TI PSNB5072A) which is
derivative of the TI MSIC chip used on Medfield with reduced capabilities.
All PMIC registers ofsets on Avondale Cove PMIC are compatible with TI MSIC.

This patch adds IPC probing and support for Cloverview SOC.

Change-Id: I1a5cd363aafd1da6eb8c6445c0fb60c584827fc4
Signed-off-by: Leonard D Mai <leonard.mai@intel.com>
Reviewed-by: Pierre Tardy <pierre.tardy@intel.com>
Reviewed-by: Mark Gross <mark.gross@intel.com>
Reviewed-by: Fei Yang <fei.yang@intel.com>
Reviewed-by: Bin Yang <bin.yang@intel.com>
Tested-by: Siva Prasath Ponnusamy <siva.prasath.ponnusamy@intel.com>
Reviewed-on: http://android.intel.com:8080/26620
Reviewed-by: Yang, Bin <bin.yang@intel.com>
Reviewed-by: Yang, Fei <fei.yang@intel.com>
Reviewed-by: Seibel, Eric <eric.seibel@intel.com>
Reviewed-by: Du, Alek <alek.du@intel.com>
Tested-by: Wang, Zhifeng <zhifeng.wang@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>

diff --git a/drivers/platform/x86/intel_scu_ipc.c b/drivers/platform/x86/intel_scu_ipc.c
index 4214948..7035ad8 100644 (file)
--- a/drivers/platform/x86/intel_scu_ipc.c
+++ b/drivers/platform/x86/intel_scu_ipc.c
@@ -208,7 +208,7 @@ static int pwr_reg_rdwr(u16 *addr, u8 *data, u32 count, u32 op, u32 id)
                return -ENODEV;
        }
 
-       if (platform != MRST_CPU_CHIP_PENWELL) {
+       if (platform == MRST_CPU_CHIP_LINCROFT) {
                bytes = 0;
                d = 0;
                for (i = 0; i < count; i++) {
@@ -222,7 +222,7 @@ static int pwr_reg_rdwr(u16 *addr, u8 *data, u32 count, u32 op, u32 id)
                for (i = 0; i < bytes; i += 4)
                        ipc_data_writel(wbuf[i/4], i);
                ipc_command(bytes << 16 |  id << 12 | 0 << 8 | op);
-       } else {
+       } else { /* Penwell or Cloverview */
                for (nc = 0; nc < count; nc++, offset += 2) {
                        cbuf[offset] = addr[nc];
                        cbuf[offset + 1] = addr[nc] >> 8;
@@ -250,7 +250,7 @@ static int pwr_reg_rdwr(u16 *addr, u8 *data, u32 count, u32 op, u32 id)
        if (id == IPC_CMD_PCNTRL_R) { /* Read rbuf */
                /* Workaround: values are read as 0 without memcpy_fromio */
                memcpy_fromio(cbuf, ipcdev.ipc_base + 0x90, 16);
-               if (platform != MRST_CPU_CHIP_PENWELL) {
+               if (platform == MRST_CPU_CHIP_LINCROFT) {
                        for (nc = 0, offset = 2; nc < count; nc++, offset += 3)
                                data[nc] = ipc_data_readb(offset);
                } else {
@@ -1569,6 +1569,7 @@ static void ipc_remove(struct pci_dev *pdev)
 static const struct pci_device_id pci_ids[] = {
        {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x080e)},
        {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x082a)},
+       {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x08ea)},
        { 0,}
 };
 MODULE_DEVICE_TABLE(pci, pci_ids);