REG_FIELD(ISC_GAM_CTRL, 2, 2),
REG_FIELD(ISC_GAM_CTRL, 3, 3),
REG_FIELD(ISC_CSC_CTRL + isc->offsets.csc, 0, 0),
- REG_FIELD(ISC_CBC_CTRL, 0, 0),
+ REG_FIELD(ISC_CBC_CTRL + isc->offsets.cbc, 0, 0),
REG_FIELD(ISC_SUB422_CTRL, 0, 0),
REG_FIELD(ISC_SUB420_CTRL, 0, 0),
};
/* Color Space Conversion CRB OCR Register */
#define ISC_CSC_CRB_OCR 0x000003b0
+/* Offset for CBC register specific to sama5d2 product */
+#define ISC_SAMA5D2_CBC_OFFSET 0
+
/* Contrast And Brightness Control Register */
#define ISC_CBC_CTRL 0x000003b4
/*
* struct isc_reg_offsets - ISC device register offsets
* @csc: Offset for the CSC register
+ * @cbc: Offset for the CBC register
*/
struct isc_reg_offsets {
u32 csc;
+ u32 cbc;
};
/*
{
struct regmap *regmap = isc->regmap;
- regmap_write(regmap, ISC_CBC_BRIGHT, isc->ctrls.brightness);
- regmap_write(regmap, ISC_CBC_CONTRAST, isc->ctrls.contrast);
+ regmap_write(regmap, ISC_CBC_BRIGHT + isc->offsets.cbc,
+ isc->ctrls.brightness);
+ regmap_write(regmap, ISC_CBC_CONTRAST + isc->offsets.cbc,
+ isc->ctrls.contrast);
}
/* Gamma table with gamma 1/2.2 */
isc->config_cbc = isc_sama5d2_config_cbc;
isc->offsets.csc = ISC_SAMA5D2_CSC_OFFSET;
+ isc->offsets.cbc = ISC_SAMA5D2_CBC_OFFSET;
/* sama5d2-isc - 8 bits per beat */
isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8;