drm/bridge/sii8620: add delay during cbus reset

Without delay CBUS sometimes was not reset properly.

Change-Id: I4392297d13c9f9b8551e292fa4e2c070202d7e7f
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>

diff --git a/drivers/gpu/drm/bridge/sil-sii8620.c b/drivers/gpu/drm/bridge/sil-sii8620.c
index 43f3d3632a6cbefbe4757b8cebef851ad0e17eb7..3ba69756816d69abb811a4eace06ea6ab4f81005 100644 (file)
--- a/drivers/gpu/drm/bridge/sil-sii8620.c
+++ b/drivers/gpu/drm/bridge/sil-sii8620.c
@@ -888,11 +888,10 @@ static void sii8620_hw_reset(struct sii8620 *ctx)
 
 static void sii8620_cbus_reset(struct sii8620 *ctx)
 {
-       sii8620_write_seq_static(ctx,
-               REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST
-                       | BIT_PWD_SRST_CBUS_RST_SW_EN,
-               REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST_SW_EN
-       );
+       sii8620_write(ctx, REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST
+                     | BIT_PWD_SRST_CBUS_RST_SW_EN);
+       usleep_range(10000, 20000);
+       sii8620_write(ctx, REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST_SW_EN);
 }
 
 static void sii8620_set_auto_zone(struct sii8620 *ctx)