drm/i915/psr: Include PSR_PERF_CNT in debugfs output on all platforms

The fact that DC states reset the PSR perofrmance counter
is no reason not to include it in the debug output.
But let's keep the comment there to remind people about
that caveat.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230411191429.29895-8-ville.syrjala@linux.intel.com
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index c981881..3a94f40 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2873,12 +2873,10 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
        /*
         * SKL+ Perf counter is reset to 0 everytime DC state is entered
         */
-       if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
-               val = intel_de_read(dev_priv,
-                                   EDP_PSR_PERF_CNT(intel_dp->psr.transcoder));
-               seq_printf(m, "Performance counter: %u\n",
-                          REG_FIELD_GET(EDP_PSR_PERF_CNT_MASK, val));
-       }
+       val = intel_de_read(dev_priv,
+                           EDP_PSR_PERF_CNT(intel_dp->psr.transcoder));
+       seq_printf(m, "Performance counter: %u\n",
+                  REG_FIELD_GET(EDP_PSR_PERF_CNT_MASK, val));
 
        if (psr->debug & I915_PSR_DEBUG_IRQ) {
                seq_printf(m, "Last attempted entry at: %lld\n",