drm/amdgpu: set page table depth by num_level
authorChunming Zhou <David1.Zhou@amd.com>
Thu, 23 Mar 2017 09:38:34 +0000 (17:38 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 30 Mar 2017 03:55:30 +0000 (23:55 -0400)
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c

index 1ff019c..987b21b 100644 (file)
@@ -195,7 +195,8 @@ int gfxhub_v1_0_gart_enable(struct amdgpu_device *adev)
        for (i = 0; i <= 14; i++) {
                tmp = RREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT1_CNTL) + i);
                tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, ENABLE_CONTEXT, 1);
-               tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, PAGE_TABLE_DEPTH, 1);
+               tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, PAGE_TABLE_DEPTH,
+                                   adev->vm_manager.num_level);
                tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,
                                RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, 1);
                tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,
index 7c2075a..128024a 100644 (file)
@@ -216,7 +216,7 @@ int mmhub_v1_0_gart_enable(struct amdgpu_device *adev)
                tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,
                                ENABLE_CONTEXT, 1);
                tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,
-                               PAGE_TABLE_DEPTH, 1);
+                               PAGE_TABLE_DEPTH, adev->vm_manager.num_level);
                tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,
                                RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, 1);
                tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL,