amdgpu/pm: modify and add smu_get_power_limit to Powerplay API
authorDarren Powell <darren.powell@amd.com>
Wed, 26 May 2021 21:31:16 +0000 (17:31 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 8 Jun 2021 16:13:56 +0000 (12:13 -0400)
 modify args of smu_get_power_limit to match Powerplay API .get_power_limit
 add smu_get_power_limit to Powerplay API swsmu_pm_funcs
 remove special handling of smu in amdgpu_hwmon_show_power_cap*

* Test
 AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1`
 AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | cut -d " " -f 11`
 HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}

 lspci -nn | grep "VGA\|Display" ; \
 echo "=== power1 cap ===" ; cat $HWMON_DIR/power1_cap ;           \
 echo "=== power1 cap max ===" ; cat $HWMON_DIR/power1_cap_max ;   \
 echo "=== power1 cap def ===" ; cat $HWMON_DIR/power1_cap_default

Signed-off-by: Darren Powell <darren.powell@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/amdgpu_pm.c
drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

index e34ca352294fb046e0df536c60f26dee62fea9a6..0a788cb38ee2705638dd43df658f5b642068193d 100644 (file)
@@ -2924,11 +2924,7 @@ static ssize_t amdgpu_hwmon_show_power_cap_max(struct device *dev,
                return r;
        }
 
-       if (is_support_sw_smu(adev)) {
-               smu_get_power_limit(&adev->smu, &limit,
-                                   pp_limit_level, power_type);
-               size = snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);
-       } else if (pp_funcs && pp_funcs->get_power_limit) {
+       if (pp_funcs && pp_funcs->get_power_limit) {
                pp_funcs->get_power_limit(adev->powerplay.pp_handle, &limit,
                                          pp_limit_level, power_type);
                size = snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);
@@ -2965,11 +2961,7 @@ static ssize_t amdgpu_hwmon_show_power_cap(struct device *dev,
                return r;
        }
 
-       if (is_support_sw_smu(adev)) {
-               smu_get_power_limit(&adev->smu, &limit,
-                                   pp_limit_level, power_type);
-               size = snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);
-       } else if (pp_funcs && pp_funcs->get_power_limit) {
+       if (pp_funcs && pp_funcs->get_power_limit) {
                pp_funcs->get_power_limit(adev->powerplay.pp_handle, &limit,
                                          pp_limit_level, power_type);
                size = snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);
@@ -3006,11 +2998,7 @@ static ssize_t amdgpu_hwmon_show_power_cap_default(struct device *dev,
                return r;
        }
 
-       if (is_support_sw_smu(adev)) {
-               smu_get_power_limit(&adev->smu, &limit,
-                                   pp_limit_level, power_type);
-               size = snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);
-       } else if (pp_funcs && pp_funcs->get_power_limit) {
+       if (pp_funcs && pp_funcs->get_power_limit) {
                pp_funcs->get_power_limit(adev->powerplay.pp_handle, &limit,
                                          pp_limit_level, power_type);
                size = snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);
index 026d9b6d5ad3510efeedbd13f48860a5dff130b6..2f7f688424aa44a171135d44dd942a0000da253f 100644 (file)
@@ -1262,7 +1262,7 @@ enum smu_cmn2asic_mapping_type {
        [profile] = {1, (workload)}
 
 #if !defined(SWSMU_CODE_LAYER_L2) && !defined(SWSMU_CODE_LAYER_L3) && !defined(SWSMU_CODE_LAYER_L4)
-int smu_get_power_limit(struct smu_context *smu,
+int smu_get_power_limit(void *handle,
                        uint32_t *limit,
                        enum pp_power_limit_level pp_limit_level,
                        enum pp_power_type pp_power_type);
index cfa680850887afbf8624133d1f0176226caceab7..c9b921cd48cddb231c3012d4eba360ac08b43a71 100644 (file)
@@ -2173,11 +2173,12 @@ static int smu_set_fan_speed_rpm(void *handle, uint32_t speed)
        return ret;
 }
 
-int smu_get_power_limit(struct smu_context *smu,
+int smu_get_power_limit(void *handle,
                        uint32_t *limit,
                        enum pp_power_limit_level pp_limit_level,
                        enum pp_power_type pp_power_type)
 {
+       struct smu_context *smu = handle;
        enum smu_ppt_limit_level limit_level;
        uint32_t limit_type;
        int ret = 0;
@@ -3016,6 +3017,7 @@ static const struct amd_pm_funcs swsmu_pm_funcs = {
        .load_firmware           = smu_load_microcode,
        .set_powergating_by_smu  = smu_dpm_set_power_gate,
        .set_power_limit         = smu_set_power_limit,
+       .get_power_limit         = smu_get_power_limit,
        .get_power_profile_mode  = smu_get_power_profile_mode,
        .set_power_profile_mode  = smu_set_power_profile_mode,
        .odn_edit_dpm_table      = smu_od_edit_dpm_table,