arm64: dts: ls208xa: comply with the iommu map binding for fsl_mc

fsl-mc bus support the new iommu-map property. Comply to this binding
for fsl_mc bus.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
index 8cb78dd..90c0faf 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
@@ -148,6 +148,7 @@
                #address-cells = <2>;
                #size-cells = <2>;
                ranges;
+               dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
 
                clockgen: clocking@1300000 {
                        compatible = "fsl,ls2080a-clockgen";
@@ -321,6 +322,8 @@
                        reg = <0x00000008 0x0c000000 0 0x40>,    /* MC portal base */
                              <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
                        msi-parent = <&its>;
+                       iommu-map = <0 &smmu 0 0>;      /* This is fixed-up by u-boot */
+                       dma-coherent;
                        #address-cells = <3>;
                        #size-cells = <1>;
 
@@ -424,6 +427,9 @@
                        compatible = "arm,mmu-500";
                        reg = <0 0x5000000 0 0x800000>;
                        #global-interrupts = <12>;
+                       #iommu-cells = <1>;
+                       stream-match-mask = <0x7C00>;
+                       dma-coherent;
                        interrupts = <0 13 4>, /* global secure fault */
                                     <0 14 4>, /* combined secure interrupt */
                                     <0 15 4>, /* global non-secure fault */
@@ -466,7 +472,6 @@
                                     <0 204 4>, <0 205 4>,
                                     <0 206 4>, <0 207 4>,
                                     <0 208 4>, <0 209 4>;
-                       mmu-masters = <&fsl_mc 0x300 0>;
                };
 
                dspi: dspi@2100000 {