struct ia_css_resolution bayer_ds_out_res;
/** bayer down scaling */
struct ia_css_resolution capt_pp_in_res;
-#ifndef ISP2401
- /** bayer down scaling */
-#else
/** capture post processing input resolution */
-#endif
struct ia_css_resolution vf_pp_in_res;
-#ifndef ISP2401
- /** bayer down scaling */
-#else
- /** view finder post processing input resolution */
+
+ /** ISP2401: view finder post processing input resolution */
struct ia_css_resolution output_system_in_res;
/** For IPU3 only: use output_system_in_res to specify what input resolution
will OSYS receive, this resolution is equal to the output resolution of GDC
if not determined CSS will set output_system_in_res with main osys output pin resolution
All other IPUs may ignore this property */
-#endif
struct ia_css_resolution dvs_crop_out_res;
/** dvs crop, video only, not in use yet. Use dvs_envelope below. */
struct ia_css_frame_info output_info[IA_CSS_PIPE_MAX_OUTPUT_STAGE];
/** Enabling BCI mode will cause yuv_scale binary to be picked up
instead of vf_pp. This only applies to viewfinder post
processing stages. */
-#ifdef ISP2401
+
+/* ISP2401 */
bool enable_luma_only;
/** Enabling of monochrome mode for a pipeline. If enabled only luma processing
will be done. */
bool enable_tnr;
/** Enabling of TNR (temporal noise reduction). This is only applicable to video
pipes. Non video-pipes should always set this parameter to false. */
-#endif
+
struct ia_css_isp_config *p_isp_config;
/** Pointer to ISP configuration */
struct ia_css_resolution gdc_in_buffer_res;
/** GDC in buffer resolution. */
struct ia_css_point gdc_in_buffer_offset;
/** GDC in buffer offset - indicates the pixel coordinates of the first valid pixel inside the buffer */
-#ifdef ISP2401
+
+/* ISP2401 */
struct ia_css_coordinate internal_frame_origin_bqs_on_sctbl;
/** Origin of internal frame positioned on shading table at shading correction in ISP.
NOTE: Shading table is larger than or equal to internal frame.
Shading table has shading gains and internal frame has bayer data.
The origin of internal frame is used in shading correction in ISP
to retrieve shading gains which correspond to bayer data. */
-#endif
};
/**
sh_css_sp_init_pipeline(pipeline, pipe_id, pipe_num,
false, false, false, true, SH_CSS_BDS_FACTOR_1_00,
SH_CSS_PIPE_CONFIG_OVRD_NO_OVRD,
-#ifndef ISP2401
- IA_CSS_INPUT_MODE_MEMORY, NULL, NULL
-#else
IA_CSS_INPUT_MODE_MEMORY, NULL, NULL,
-#endif
#if !defined(HAS_NO_INPUT_SYSTEM)
-#ifndef ISP2401
- , (enum mipi_port_id)0
-#else
(enum mipi_port_id)0,
#endif
-#endif
-#ifndef ISP2401
- );
-#else
NULL, NULL);
-#endif
+
ia_css_pipeline_get_sp_thread_id(pipe_num, &thread_id);
if (!sh_css_sp_is_running()) {
ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
enum sh_css_pipe_config_override copy_ovrd,
enum ia_css_input_mode input_mode)
{
+ const struct ia_css_coordinate *coord = NULL;
+ const struct ia_css_isp_parameters *params = NULL;
+
#if defined(HAS_NO_INPUT_SYSTEM)
(void)input_mode;
#endif
assert(me); /* all callers are in this file and call with non null argument */
+ if (atomisp_hw_is_isp2401) {
+ coord = &me->config.internal_frame_origin_bqs_on_sctbl;
+ params = me->stream->isp_params_configs;
+ }
+
sh_css_sp_init_pipeline(&me->pipeline,
me->mode,
(uint8_t)ia_css_pipe_get_pipe_num(me),
#if !defined(HAS_NO_INPUT_SYSTEM)
, (input_mode == IA_CSS_INPUT_MODE_MEMORY) ?
(enum mipi_port_id)0 :
- me->stream->config.source.port.port
-#endif
-#ifdef ISP2401
- , &me->config.internal_frame_origin_bqs_on_sctbl,
- me->stream->isp_params_configs
+ me->stream->config.source.port.port,
#endif
- );
+ coord,
+ params);
if (me->config.mode != IA_CSS_PIPE_MODE_COPY) {
struct ia_css_pipeline_stage *stage;
struct ia_css_pipe *acc_pipe;
enum sh_css_pipe_config_override copy_ovrd;
enum ia_css_input_mode preview_pipe_input_mode;
+ const struct ia_css_coordinate *coord = NULL;
+ const struct ia_css_isp_parameters *params = NULL;
IA_CSS_ENTER_PRIVATE("pipe = %p", pipe);
if ((!pipe) || (!pipe->stream) || (pipe->mode != IA_CSS_PIPE_ID_PREVIEW))
#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401)
/* multi stream video needs mipi buffers */
err = send_mipi_frames(pipe);
- if (err != IA_CSS_SUCCESS)
- goto ERR;
+ if (err != IA_CSS_SUCCESS) {
+ IA_CSS_LEAVE_ERR_PRIVATE(err);
+ return err;
+ }
#endif
send_raw_frames(pipe);
}
}
+ if (atomisp_hw_is_isp2401) {
+ coord = &pipe->config.internal_frame_origin_bqs_on_sctbl;
+ params = pipe->stream->isp_params_configs;
+ }
+
/* Construct and load the copy pipe */
if (pipe->stream->config.continuous)
{
copy_ovrd,
pipe->stream->config.mode,
&pipe->stream->config.metadata_config,
-#ifndef ISP2401
- &pipe->stream->info.metadata_info
-#else
&pipe->stream->info.metadata_info,
-#endif
#if !defined(HAS_NO_INPUT_SYSTEM)
-#ifndef ISP2401
- , pipe->stream->config.source.port.port
-#else
pipe->stream->config.source.port.port,
#endif
-#endif
-#ifndef ISP2401
- );
-#else
- & pipe->config.internal_frame_origin_bqs_on_sctbl,
- pipe->stream->isp_params_configs);
-#endif
+ coord,
+ params);
/* make the preview pipe start with mem mode input, copy handles
the actual mode */
0,
IA_CSS_INPUT_MODE_MEMORY,
&pipe->stream->config.metadata_config,
-#ifndef ISP2401
- &pipe->stream->info.metadata_info
-#else
&pipe->stream->info.metadata_info,
-#endif
#if !defined(HAS_NO_INPUT_SYSTEM)
-#ifndef ISP2401
- , (enum mipi_port_id)0
-#else
(enum mipi_port_id)0,
#endif
-#endif
-#ifndef ISP2401
- );
-#else
- & capture_pipe->config.internal_frame_origin_bqs_on_sctbl,
- capture_pipe->stream->isp_params_configs);
-#endif
+ coord,
+ params);
}
if (acc_pipe)
0,
IA_CSS_INPUT_MODE_MEMORY,
NULL,
-#ifndef ISP2401
- NULL
-#else
NULL,
-#endif
#if !defined(HAS_NO_INPUT_SYSTEM)
-#ifndef ISP2401
- , (enum mipi_port_id)0
-#else
(enum mipi_port_id)0,
#endif
-#endif
-#ifndef ISP2401
- );
-#else
- & pipe->config.internal_frame_origin_bqs_on_sctbl,
- pipe->stream->isp_params_configs);
-#endif
+ coord,
+ params);
}
start_pipe(pipe, copy_ovrd, preview_pipe_input_mode);
-#if defined(USE_INPUT_SYSTEM_VERSION_2) || defined(USE_INPUT_SYSTEM_VERSION_2401)
-ERR:
-#endif
IA_CSS_LEAVE_ERR_PRIVATE(err);
return err;
}
enum sh_css_pipe_config_override copy_ovrd;
enum ia_css_input_mode video_pipe_input_mode;
+ const struct ia_css_coordinate *coord = NULL;
+ const struct ia_css_isp_parameters *params = NULL;
+
IA_CSS_ENTER_PRIVATE("pipe = %p", pipe);
if ((!pipe) || (pipe->mode != IA_CSS_PIPE_ID_VIDEO)) {
IA_CSS_LEAVE_ERR_PRIVATE(IA_CSS_ERR_INVALID_ARGUMENTS);
}
}
+ if (atomisp_hw_is_isp2401) {
+ coord = &pipe->config.internal_frame_origin_bqs_on_sctbl;
+ params = pipe->stream->isp_params_configs;
+ }
+
/* Construct and load the copy pipe */
if (pipe->stream->config.continuous) {
sh_css_sp_init_pipeline(©_pipe->pipeline,
copy_ovrd,
pipe->stream->config.mode,
&pipe->stream->config.metadata_config,
-#ifndef ISP2401
- &pipe->stream->info.metadata_info
-#else
&pipe->stream->info.metadata_info,
-#endif
#if !defined(HAS_NO_INPUT_SYSTEM)
-#ifndef ISP2401
- , pipe->stream->config.source.port.port
-#else
pipe->stream->config.source.port.port,
#endif
-#endif
-#ifndef ISP2401
- );
-#else
- & copy_pipe->config.internal_frame_origin_bqs_on_sctbl,
- copy_pipe->stream->isp_params_configs);
-#endif
+ coord,
+ params);
/* make the video pipe start with mem mode input, copy handles
the actual mode */
0,
IA_CSS_INPUT_MODE_MEMORY,
&pipe->stream->config.metadata_config,
-#ifndef ISP2401
- &pipe->stream->info.metadata_info
-#else
&pipe->stream->info.metadata_info,
-#endif
#if !defined(HAS_NO_INPUT_SYSTEM)
-#ifndef ISP2401
- , (enum mipi_port_id)0
-#else
(enum mipi_port_id)0,
#endif
-#endif
-#ifndef ISP2401
- );
-#else
- & capture_pipe->config.internal_frame_origin_bqs_on_sctbl,
- capture_pipe->stream->isp_params_configs);
-#endif
+ coord,
+ params);
}
start_pipe(pipe, copy_ovrd, video_pipe_input_mode);
#if !defined(HAS_NO_INPUT_FORMATTER)
#include "input_formatter.h"
#endif
-#if !defined(HAS_NO_INPUT_SYSTEM)
#include "input_system.h"
-#endif
#include "ia_css_types.h"
#include "ia_css_acc_types.h"
};
#endif
-#if !defined(HAS_NO_INPUT_SYSTEM)
#define IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT (3)
-#endif
/* SP configuration information */
struct sh_css_sp_config {
u8 input_circuit_cfg_changed;
u32 mipi_sizes_for_check[N_CSI_PORTS][IA_CSS_MIPI_SIZE_CHECK_MAX_NOF_ENTRIES_PER_PORT];
#endif
-#if !defined(HAS_NO_INPUT_SYSTEM)
u8 enable_isys_event_queue;
-#endif
u8 disable_cont_vf;
};
u32 inout_port_config;
u32 required_bds_factor;
u32 dvs_frame_delay;
-#if !defined(HAS_NO_INPUT_SYSTEM)
u32 input_system_mode; /* enum ia_css_input_mode */
u32 port_id; /* port_id for input system */
-#endif
u32 num_stages; /* the pipe config */
u32 running; /* needed for pipe termination */
hrt_vaddress sp_stage_addr[SH_CSS_MAX_STAGES];
u32 raw_bit_depth;
} raw;
} copy;
-#ifdef ISP2401
+
+/* ISP2401 */
/* Parameters passed to Shading Correction kernel. */
struct {
u32 internal_frame_origin_x_bqs_on_sctbl; /* Origin X (bqs) of internal frame on shading table */
u32 internal_frame_origin_y_bqs_on_sctbl; /* Origin Y (bqs) of internal frame on shading table */
} shading;
-#endif
};
/*
#define IA_CSS_NUM_ELEMS_HOST2SP_PARAM_QUEUE 3
#define IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE 6
-#if !defined(HAS_NO_INPUT_SYSTEM)
/* sp-to-host queue is expected to be emptied in ISR since
* it is used instead of HW interrupts (due to HW design issue).
* We need one queue element per CSI port. */
* in the emptying of this queue in the SP since there is no
* separate SP thread for this. */
#define IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE (2 * N_CSI_PORTS)
-#else
-#define IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE 0
-#define IA_CSS_NUM_ELEMS_HOST2SP_ISYS_EVENT_QUEUE 0
-#define IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE 0
-#endif
#if defined(HAS_SP_2400)
#define IA_CSS_NUM_ELEMS_HOST2SP_PSYS_EVENT_QUEUE 13
sh_css_sp2host_buffer_queue,
sh_css_host2sp_psys_event_queue,
sh_css_sp2host_psys_event_queue,
-#if !defined(HAS_NO_INPUT_SYSTEM)
sh_css_sp2host_isys_event_queue,
sh_css_host2sp_isys_event_queue,
sh_css_host2sp_tag_cmd_queue,
-#endif
};
struct sh_css_event_irq_mask {
ia_css_circbuf_elem_t sp2host_psys_event_queue_elems
[IA_CSS_NUM_ELEMS_SP2HOST_PSYS_EVENT_QUEUE];
-#if !defined(HAS_NO_INPUT_SYSTEM)
/*
* The queues for the ISYS events.
*/
ia_css_circbuf_elem_t host2sp_tag_cmd_queue_elems
[IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE];
-#endif
};
#define SIZE_OF_QUEUES_ELEMS \
(IA_CSS_NUM_ELEMS_SP2HOST_ISYS_EVENT_QUEUE) + \
(IA_CSS_NUM_ELEMS_HOST2SP_TAG_CMD_QUEUE)))
-#if !defined(HAS_NO_INPUT_SYSTEM)
#define IA_CSS_NUM_CIRCBUF_DESCS 5
-#else
-#ifndef ISP2401
-#define IA_CSS_NUM_CIRCBUF_DESCS 3
-#else
-#define IA_CSS_NUM_CIRCBUF_DESCS 2
-#endif
-#endif
#define SIZE_OF_QUEUES_DESC \
((SH_CSS_MAX_SP_THREADS * SH_CSS_MAX_NUM_QUEUES * \
const struct ia_css_metadata_config *md_config,
const struct ia_css_metadata_info *md_info,
#if !defined(HAS_NO_INPUT_SYSTEM)
- const enum mipi_port_id port_id
+ const enum mipi_port_id port_id,
#endif
-#ifdef ISP2401
- ,
const struct ia_css_coordinate
*internal_frame_origin_bqs_on_sctbl, /* Origin of internal frame
positioned on shading table at shading correction in ISP. */
const struct ia_css_isp_parameters *params
-#endif
) {
/* Get first stage */
struct ia_css_pipeline_stage *stage = NULL;
}
#endif
-#ifdef ISP2401
- /* For the shading correction type 1 (the legacy shading table conversion in css is not used),
- * the parameters are passed to the isp for the shading table centering.
- */
- if (internal_frame_origin_bqs_on_sctbl &&
- params && params->shading_settings.enable_shading_table_conversion == 0)
- {
- sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_x_bqs_on_sctbl
- = (uint32_t)internal_frame_origin_bqs_on_sctbl->x;
- sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_y_bqs_on_sctbl
- = (uint32_t)internal_frame_origin_bqs_on_sctbl->y;
- } else
- {
- sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_x_bqs_on_sctbl =
- 0;
- sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_y_bqs_on_sctbl =
- 0;
+ if (atomisp_hw_is_isp2401) {
+ /* For the shading correction type 1 (the legacy shading table conversion in css is not used),
+ * the parameters are passed to the isp for the shading table centering.
+ */
+ if (internal_frame_origin_bqs_on_sctbl &&
+ params && params->shading_settings.enable_shading_table_conversion == 0)
+ {
+ sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_x_bqs_on_sctbl
+ = (uint32_t)internal_frame_origin_bqs_on_sctbl->x;
+ sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_y_bqs_on_sctbl
+ = (uint32_t)internal_frame_origin_bqs_on_sctbl->y;
+ } else
+ {
+ sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_x_bqs_on_sctbl =
+ 0;
+ sh_css_sp_group.pipe[thread_id].shading.internal_frame_origin_y_bqs_on_sctbl =
+ 0;
+ }
}
-#endif
IA_CSS_LOG("pipe_id %d port_config %08x",
pipe_id, sh_css_sp_group.pipe[thread_id].inout_port_config);
const struct ia_css_metadata_config *md_config,
const struct ia_css_metadata_info *md_info,
#if !defined(HAS_NO_INPUT_SYSTEM)
- const enum mipi_port_id port_id
+ const enum mipi_port_id port_id,
#endif
-#ifdef ISP2401
- ,
const struct ia_css_coordinate
*internal_frame_origin_bqs_on_sctbl, /* Origin of internal frame
positioned on shading table at shading correction in ISP. */
const struct ia_css_isp_parameters *params
-#endif
);
void