Blackfin: respect CONFIG_CLKIN_HALF

As pointed out by Ivan Koryakovskiy, the initialization code was not
actually respecting the CONFIG_CLKIN_HALF option when configuring the
PLL_CTL register.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

diff --git a/cpu/blackfin/initcode.c b/cpu/blackfin/initcode.c
index ffc8420..e733dd2 100644 (file)
--- a/cpu/blackfin/initcode.c
+++ b/cpu/blackfin/initcode.c
@@ -158,7 +158,7 @@ static inline void serial_putc(char c)
 #endif
 
 #ifndef CONFIG_PLL_CTL_VAL
-# define CONFIG_PLL_CTL_VAL (SPORT_HYST | (CONFIG_VCO_MULT << 9))
+# define CONFIG_PLL_CTL_VAL (SPORT_HYST | (CONFIG_VCO_MULT << 9) | CONFIG_CLKIN_HALF)
 #endif
 
 #ifndef CONFIG_EBIU_RSTCTL_VAL