ARM: dts: Add HS400 support for exynos5420 and exynos5800

HS400 timing values are added for SMDK5420, exynos5420-peach-pit
and exynos5800-peach-pi boards. This also adds RCLK GPIO line,
this gpio should be in pull-down state.
This also enables HS400 on peach-pi and this updates the clock
frequency to 800MHz to be set as input clock to controller.

Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
[alim.akhtar@samsung.com: addressed review comments]
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>

diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index 3f4e2fe..0788d08 100644 (file)
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -699,8 +699,10 @@
        samsung,dw-mshc-ciu-div = <3>;
        samsung,dw-mshc-sdr-timing = <0 4>;
        samsung,dw-mshc-ddr-timing = <0 2>;
+       samsung,dw-mshc-hs400-timing = <0 2>;
+       samsung,read-strobe-delay = <90>;
        pinctrl-names = "default";
-       pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
+       pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_rclk>;
        bus-width = <8>;
 };
 

diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
index ba686e4..8b15316 100644 (file)
--- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi
@@ -201,6 +201,13 @@
                        samsung,pin-drv = <3>;
                };
 
+               sd0_rclk: sd0-rclk {
+                       samsung,pins = "gpc0-7";
+                       samsung,pin-function = <2>;
+                       samsung,pin-pud = <1>;
+                       samsung,pin-drv = <3>;
+               };
+
                sd1_cmd: sd1-cmd {
                        samsung,pins = "gpc1-1";
                        samsung,pin-function = <2>;

diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index 7a56852..9103f23 100644 (file)
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -80,8 +80,11 @@
                samsung,dw-mshc-ciu-div = <3>;
                samsung,dw-mshc-sdr-timing = <0 4>;
                samsung,dw-mshc-ddr-timing = <0 2>;
+               samsung,dw-mshc-hs400-timing = <0 2>;
+               samsung,read-strobe-delay = <90>;
                pinctrl-names = "default";
-               pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
+               pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8
+                            &sd0_rclk>;
                bus-width = <8>;
                cap-mmc-highspeed;
        };

diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index c833bac..412f41d 100644 (file)
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -654,15 +654,18 @@
        num-slots = <1>;
        broken-cd;
        mmc-hs200-1_8v;
+       mmc-hs400-1_8v;
        cap-mmc-highspeed;
        non-removable;
        card-detect-delay = <200>;
-       clock-frequency = <400000000>;
+       clock-frequency = <800000000>;
        samsung,dw-mshc-ciu-div = <3>;
        samsung,dw-mshc-sdr-timing = <0 4>;
        samsung,dw-mshc-ddr-timing = <0 2>;
+       samsung,dw-mshc-hs400-timing = <0 2>;
+       samsung,read-strobe-delay = <90>;
        pinctrl-names = "default";
-       pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
+       pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_rclk>;
        bus-width = <8>;
 };