The workaround will be dynamically enabled when an affected
core is detected.
+config ARCH_TIMER_REGISTERS_NOT_FW_CONFIGURED
+ bool "Workaround for arch timer registers not configured by firmware"
+ default y
+ select ARM_ARCH_TIMER_OOL_WORKAROUND
+ depends on ARM_ARCH_TIMER && ARM64
+ help
+ This option enables a workaround for boards, on which arch timer
+ registers are not properly configured by the board firmware.
+ The workaround will be dynamically enabled when an affected
+ board is detected.
+
config ARM_GLOBAL_TIMER
bool "Support for the ARM global timer" if COMPILE_TEST
select TIMER_OF if OF
.read_cntvct_el0 = arm64_858921_read_cntvct_el0,
},
#endif
+#ifdef CONFIG_ARM64_ERRATUM_1188873
+ {
+ .match_type = ate_match_local_cap_id,
+ .id = (void *)ARM64_WORKAROUND_1188873,
+ .desc = "ARM erratum 1188873",
+ .read_cntvct_el0 = arm64_1188873_read_cntvct_el0,
+ },
+#endif
+#ifdef CONFIG_ARCH_TIMER_REGISTERS_NOT_FW_CONFIGURED
+ {
+ .match_type = ate_match_dt,
+ .id = "arm,cpu-registers-not-fw-configured",
+ .desc = "broken CPU firmware (timer registers not configured)",
+ .read_cntvct_el0 = arch_counter_get_cntpct,
+ },
+#endif
};
typedef bool (*ate_match_fn_t)(const struct arch_timer_erratum_workaround *,
* If we cannot rely on firmware initializing the timer registers then
* we should use the physical timers instead.
*/
- if (IS_ENABLED(CONFIG_ARM) &&
- of_property_read_bool(np, "arm,cpu-registers-not-fw-configured"))
- arch_timer_uses_ppi = ARCH_TIMER_PHYS_SECURE_PPI;
+ if (of_property_read_bool(np, "arm,cpu-registers-not-fw-configured"))
+ arch_timer_uses_ppi = IS_ENABLED(CONFIG_ARM64) ?
+ ARCH_TIMER_PHYS_NONSECURE_PPI :
+ ARCH_TIMER_PHYS_SECURE_PPI;
else
arch_timer_uses_ppi = arch_timer_select_ppi();