tg3: Enable EEE support for capable 10/100 devs
authorMatt Carlson <mcarlson@broadcom.com>
Wed, 14 Dec 2011 11:09:57 +0000 (11:09 +0000)
committerDavid S. Miller <davem@davemloft.net>
Thu, 15 Dec 2011 18:09:10 +0000 (13:09 -0500)
There are some devices in the 57765 ASIC rev that are EEE capable.
Unfortunately the EEE setup code only gets executed if the device is
gigabit capable.  This patch fixes the problem.

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Reviewed-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/broadcom/tg3.c

index 1979151..8a6ea19 100644 (file)
@@ -3595,18 +3595,17 @@ static int tg3_phy_autoneg_cfg(struct tg3 *tp, u32 advertise, u32 flowctrl)
        if (err)
                goto done;
 
-       if (tp->phy_flags & TG3_PHYFLG_10_100_ONLY)
-               goto done;
-
-       new_adv = ethtool_adv_to_mii_ctrl1000_t(advertise);
+       if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) {
+               new_adv = ethtool_adv_to_mii_ctrl1000_t(advertise);
 
-       if (tp->pci_chip_rev_id == CHIPREV_ID_5701_A0 ||
-           tp->pci_chip_rev_id == CHIPREV_ID_5701_B0)
-               new_adv |= CTL1000_AS_MASTER | CTL1000_ENABLE_MASTER;
+               if (tp->pci_chip_rev_id == CHIPREV_ID_5701_A0 ||
+                   tp->pci_chip_rev_id == CHIPREV_ID_5701_B0)
+                       new_adv |= CTL1000_AS_MASTER | CTL1000_ENABLE_MASTER;
 
-       err = tg3_writephy(tp, MII_CTRL1000, new_adv);
-       if (err)
-               goto done;
+               err = tg3_writephy(tp, MII_CTRL1000, new_adv);
+               if (err)
+                       goto done;
+       }
 
        if (!(tp->phy_flags & TG3_PHYFLG_EEE_CAP))
                goto done;