handle->chip_info->sram_visible = false;
handle->chip_info->nn = true;
handle->chip_info->lm2lm3 = false;
+ handle->chip_info->lm_size = ICP_QAT_UCLO_MAX_LMEM_REG;
handle->chip_info->fw_auth = true;
break;
case PCI_DEVICE_ID_INTEL_QAT_DH895XCC:
handle->chip_info->sram_visible = true;
handle->chip_info->nn = true;
handle->chip_info->lm2lm3 = false;
+ handle->chip_info->lm_size = ICP_QAT_UCLO_MAX_LMEM_REG;
handle->chip_info->fw_auth = false;
break;
default:
unsigned int ae;
if (qat_uclo_fetch_initmem_ae(handle, init_mem,
- ICP_QAT_UCLO_MAX_LMEM_REG, &ae))
+ handle->chip_info->lm_size, &ae))
return -EINVAL;
if (qat_uclo_create_batch_init_list(handle, init_mem, ae,
&obj_handle->lm_init_tab[ae]))