* gcc.target/i386/hle-add-acq-1.c: Allow for ; after lock.
* gcc.target/i386/hle-add-rel-1.c: Likewise.
* gcc.target/i386/hle-and-acq-1.c: Likewise.
* gcc.target/i386/hle-and-rel-1.c: Likewise.
* gcc.target/i386/hle-cmpxchg-acq-1.c: Likewise.
* gcc.target/i386/hle-cmpxchg-rel-1.c: Likewise.
* gcc.target/i386/hle-or-acq-1.c: Likewise.
* gcc.target/i386/hle-or-rel-1.c: Likewise.
* gcc.target/i386/hle-sub-acq-1.c: Likewise.
* gcc.target/i386/hle-sub-rel-1.c: Likewise.
* gcc.target/i386/hle-xadd-acq-1.c: Likewise.
* gcc.target/i386/hle-xadd-rel-1.c: Likewise.
* gcc.target/i386/hle-xor-acq-1.c: Likewise.
* gcc.target/i386/hle-xor-rel-1.c: Likewise.
From-SVN: r187321
+2012-05-09 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * gcc.target/i386/hle-add-acq-1.c: Allow for ; after lock.
+ * gcc.target/i386/hle-add-rel-1.c: Likewise.
+ * gcc.target/i386/hle-and-acq-1.c: Likewise.
+ * gcc.target/i386/hle-and-rel-1.c: Likewise.
+ * gcc.target/i386/hle-cmpxchg-acq-1.c: Likewise.
+ * gcc.target/i386/hle-cmpxchg-rel-1.c: Likewise.
+ * gcc.target/i386/hle-or-acq-1.c: Likewise.
+ * gcc.target/i386/hle-or-rel-1.c: Likewise.
+ * gcc.target/i386/hle-sub-acq-1.c: Likewise.
+ * gcc.target/i386/hle-sub-rel-1.c: Likewise.
+ * gcc.target/i386/hle-xadd-acq-1.c: Likewise.
+ * gcc.target/i386/hle-xadd-rel-1.c: Likewise.
+ * gcc.target/i386/hle-xor-acq-1.c: Likewise.
+ * gcc.target/i386/hle-xor-rel-1.c: Likewise.
+
2012-05-09 Dehao Chen <dehao@google.com>
* gcc.dg/predict-1.c: Remove the replicated text in this test.
/* { dg-do compile } */
/* { dg-options "-mhle" } */
-/* { dg-final { scan-assembler "lock\[ \n\t\]+\(xacquire\|\.byte\[ \t\]+0xf2\)\[ \t\n\]+add" } } */
+/* { dg-final { scan-assembler "lock;?\[ \n\t\]+\(xacquire\|\.byte\[ \t\]+0xf2\)\[ \t\n\]+add" } } */
void
hle_add (int *p, int v)
/* { dg-do compile } */
/* { dg-options "-mhle" } */
-/* { dg-final { scan-assembler "lock\[ \n\t\]+\(xrelease\|\.byte\[ \t\]+0xf3\)\[ \t\n\]+add" } } */
+/* { dg-final { scan-assembler "lock;?\[ \n\t\]+\(xrelease\|\.byte\[ \t\]+0xf3\)\[ \t\n\]+add" } } */
void
hle_add (int *p, int v)
/* { dg-do compile } */
/* { dg-options "-mhle" } */
-/* { dg-final { scan-assembler "lock\[ \n\t\]+\(xacquire\|\.byte\[ \t\]+0xf2\)\[ \t\n\]+and" } } */
+/* { dg-final { scan-assembler "lock;?\[ \n\t\]+\(xacquire\|\.byte\[ \t\]+0xf2\)\[ \t\n\]+and" } } */
void
hle_and (int *p, int v)
/* { dg-do compile } */
/* { dg-options "-mhle" } */
-/* { dg-final { scan-assembler "lock\[ \n\t\]+\(xrelease\|\.byte\[ \t\]+0xf3\)\[ \t\n\]+and" } } */
+/* { dg-final { scan-assembler "lock;?\[ \n\t\]+\(xrelease\|\.byte\[ \t\]+0xf3\)\[ \t\n\]+and" } } */
void
hle_and (int *p, int v)
/* { dg-do compile } */
/* { dg-options "-march=x86-64 -mhle" } */
-/* { dg-final { scan-assembler "lock\[ \n\t\]+\(xacquire\|\.byte\[ \t\]+0xf2\)\[ \t\n\]+cmpxchg" } } */
+/* { dg-final { scan-assembler "lock;?\[ \n\t\]+\(xacquire\|\.byte\[ \t\]+0xf2\)\[ \t\n\]+cmpxchg" } } */
int
hle_cmpxchg (int *p, int oldv, int newv)
/* { dg-do compile } */
/* { dg-options "-march=x86-64 -mhle" } */
-/* { dg-final { scan-assembler "lock\[ \n\t\]+\(xrelease\|\.byte\[ \t\]+0xf3\)\[ \t\n\]+cmpxchg" } } */
+/* { dg-final { scan-assembler "lock;?\[ \n\t\]+\(xrelease\|\.byte\[ \t\]+0xf3\)\[ \t\n\]+cmpxchg" } } */
int
hle_cmpxchg (int *p, int oldv, int newv)
/* { dg-do compile } */
/* { dg-options "-mhle" } */
-/* { dg-final { scan-assembler "lock\[ \n\t\]+\(xacquire\|\.byte\[ \t\]+0xf2\)\[ \t\n\]+or" } } */
+/* { dg-final { scan-assembler "lock;?\[ \n\t\]+\(xacquire\|\.byte\[ \t\]+0xf2\)\[ \t\n\]+or" } } */
void
hle_or (int *p, int v)
/* { dg-do compile } */
/* { dg-options "-mhle" } */
-/* { dg-final { scan-assembler "lock\[ \n\t\]+\(xrelease\|\.byte\[ \t\]+0xf3\)\[ \t\n\]+or" } } */
+/* { dg-final { scan-assembler "lock;?\[ \n\t\]+\(xrelease\|\.byte\[ \t\]+0xf3\)\[ \t\n\]+or" } } */
void
hle_xor (int *p, int v)
/* { dg-do compile } */
/* { dg-options "-mhle" } */
-/* { dg-final { scan-assembler "lock\[ \n\t\]+\(xacquire\|\.byte\[ \t\]+0xf2\)\[ \t\n\]+sub" } } */
+/* { dg-final { scan-assembler "lock;?\[ \n\t\]+\(xacquire\|\.byte\[ \t\]+0xf2\)\[ \t\n\]+sub" } } */
void
hle_sub (int *p, int v)
/* { dg-do compile } */
/* { dg-options "-mhle" } */
-/* { dg-final { scan-assembler "lock\[ \n\t\]+\(xrelease\|\.byte\[ \t\]+0xf3\)\[ \t\n\]+sub" } } */
+/* { dg-final { scan-assembler "lock;?\[ \n\t\]+\(xrelease\|\.byte\[ \t\]+0xf3\)\[ \t\n\]+sub" } } */
void
hle_sub (int *p, int v)
/* { dg-do compile } */
/* { dg-options "-march=x86-64 -mhle" } */
-/* { dg-final { scan-assembler "lock\[ \n\t\]+\(xacquire\|\.byte\[ \t\]+0xf2\)\[ \t\n\]+xadd" } } */
+/* { dg-final { scan-assembler "lock;?\[ \n\t\]+\(xacquire\|\.byte\[ \t\]+0xf2\)\[ \t\n\]+xadd" } } */
int
hle_xadd (int *p, int v)
/* { dg-do compile } */
/* { dg-options "-march=x86-64 -mhle" } */
-/* { dg-final { scan-assembler "lock\[ \n\t\]+\(xrelease\|\.byte\[ \t\]+0xf3\)\[ \t\n\]+xadd" } } */
+/* { dg-final { scan-assembler "lock;?\[ \n\t\]+\(xrelease\|\.byte\[ \t\]+0xf3\)\[ \t\n\]+xadd" } } */
int
hle_xadd (int *p, int v)
/* { dg-do compile } */
/* { dg-options "-mhle" } */
-/* { dg-final { scan-assembler "lock\[ \n\t\]+\(xacquire\|\.byte\[ \t\]+0xf2\)\[ \t\n\]+xor" } } */
+/* { dg-final { scan-assembler "lock;?\[ \n\t\]+\(xacquire\|\.byte\[ \t\]+0xf2\)\[ \t\n\]+xor" } } */
void
hle_xor (int *p, int v)
/* { dg-do compile } */
/* { dg-options "-mhle" } */
-/* { dg-final { scan-assembler "lock\[ \n\t\]+\(xrelease\|\.byte\[ \t\]+0xf3\)\[ \t\n\]+xor" } } */
+/* { dg-final { scan-assembler "lock;?\[ \n\t\]+\(xrelease\|\.byte\[ \t\]+0xf3\)\[ \t\n\]+xor" } } */
void
hle_xor (int *p, int v)