return true;
}
+ case TargetOpcode::G_CONSTANT: {
+ if (Ty.getSizeInBits() <= 32)
+ I.setDesc(TII.get(AArch64::MOVi32imm));
+ else if (Ty.getSizeInBits() <= 64)
+ I.setDesc(TII.get(AArch64::MOVi64imm));
+ else
+ return false;
+ return constrainSelectedInstRegOperands(I, TII, TRI, RBI);
+ }
+
case TargetOpcode::G_FRAME_INDEX: {
// allocas and G_FRAME_INDEX are only supported in addrspace(0).
if (Ty != LLT::pointer(0, 64)) {
define void @selected_property() { ret void }
+ define i32 @const_s32() { ret i32 42 }
+ define i64 @const_s64() { ret i64 1234567890123 }
+
...
---
body: |
bb.0:
...
+
+---
+# CHECK-LABEL: name: const_s32
+name: const_s32
+legalized: true
+regBankSelected: true
+registers:
+ - { id: 0, class: gpr }
+
+# CHECK: body:
+# CHECK: %0 = MOVi32imm 42
+body: |
+ bb.0:
+ %0(s32) = G_CONSTANT 42
+...
+
+---
+# CHECK-LABEL: name: const_s64
+name: const_s64
+legalized: true
+regBankSelected: true
+registers:
+ - { id: 0, class: gpr }
+
+# CHECK: body:
+# CHECK: %0 = MOVi64imm 1234567890123
+body: |
+ bb.0:
+ %0(s64) = G_CONSTANT 1234567890123
+...