Texas Instruments K3 SoC family changes for 5.3
- Add support for the new J721e SoC, includes basic peripherals needed for
booting up the device
- New peripheral support added for AM654x:
* TI SCI irqchip
* GPIO
* MCU SRAM
* R5Fs
* MSMC RAM
* SERDES and PCIe
* tag 'ti-k3-soc-for-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux: (26 commits)
arm64: dts: ti: k3-j721e: Add the MCU SRAM node
arm64: dts: ti: k3-j721e: Add interrupt controllers in wakeup domain
arm64: dts: ti: k3-j721e: Add interrupt controllers in main domain
arm64: dts: ti: k3-j721e-main: Add Main NavSS Interrupt controller node
arm64: defconfig: Enable TI's J721E SoC platform
arm64: dts: ti: Add support for J721E Common Processor Board
soc: ti: Add Support for J721E SoC config option
arm64: dts: ti: Add Support for J721E SoC
dt-bindings: serial: 8250_omap: Add compatible for J721E UART controller
dt-bindings: arm: ti: Add bindings for J721E SoC
arm64: dts: ti: am654-base-board: Disable SERDES and PCIe
arm64: dts: k3-am6: Add PCIe Endpoint DT node
arm64: dts: k3-am6: Add PCIe Root Complex DT node
arm64: dts: k3-am6: Add SERDES DT node
arm64: dts: k3-am6: Add mux-controller DT node required for muxing SERDES
arm64: dts: k3-am6: Add "socionext,synquacer-pre-its" property to gic_its
arm64: dts: ti: k3-am65: Add MSMC RAM ranges in interconnect node
arm64: dts: ti: k3-am65: Add R5F ranges in interconnect nodes
arm64: dts: ti: k3-am65-mcu: Add the MCU RAM node
arm64: dts: ti: k3-am65: Add MCU SRAM ranges in interconnect nodes
...
Signed-off-by: Olof Johansson <olof@lixom.net>