PCI: aardvark: Fix masking and unmasking legacy INTx interrupts

commit d212dcee27c1f89517181047e5485fcbba4a25c2 upstream.

irq_mask and irq_unmask callbacks need to be properly guarded by raw spin
locks as masking/unmasking procedure needs atomic read-modify-write
operation on hardware register.

Link: https://lore.kernel.org/r/20210820155020.3000-1-pali@kernel.org
Reported-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index 85c7d06..88e19ad 100644 (file)
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -237,6 +237,7 @@ struct advk_pcie {
        u8 wins_count;
        struct irq_domain *irq_domain;
        struct irq_chip irq_chip;
+       raw_spinlock_t irq_lock;
        struct irq_domain *msi_domain;
        struct irq_domain *msi_inner_domain;
        struct irq_chip msi_bottom_irq_chip;
@@ -1045,22 +1046,28 @@ static void advk_pcie_irq_mask(struct irq_data *d)
 {
        struct advk_pcie *pcie = d->domain->host_data;
        irq_hw_number_t hwirq = irqd_to_hwirq(d);
+       unsigned long flags;
        u32 mask;
 
+       raw_spin_lock_irqsave(&pcie->irq_lock, flags);
        mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);
        mask |= PCIE_ISR1_INTX_ASSERT(hwirq);
        advk_writel(pcie, mask, PCIE_ISR1_MASK_REG);
+       raw_spin_unlock_irqrestore(&pcie->irq_lock, flags);
 }
 
 static void advk_pcie_irq_unmask(struct irq_data *d)
 {
        struct advk_pcie *pcie = d->domain->host_data;
        irq_hw_number_t hwirq = irqd_to_hwirq(d);
+       unsigned long flags;
        u32 mask;
 
+       raw_spin_lock_irqsave(&pcie->irq_lock, flags);
        mask = advk_readl(pcie, PCIE_ISR1_MASK_REG);
        mask &= ~PCIE_ISR1_INTX_ASSERT(hwirq);
        advk_writel(pcie, mask, PCIE_ISR1_MASK_REG);
+       raw_spin_unlock_irqrestore(&pcie->irq_lock, flags);
 }
 
 static int advk_pcie_irq_map(struct irq_domain *h,
@@ -1144,6 +1151,8 @@ static int advk_pcie_init_irq_domain(struct advk_pcie *pcie)
        struct irq_chip *irq_chip;
        int ret = 0;
 
+       raw_spin_lock_init(&pcie->irq_lock);
+
        pcie_intc_node =  of_get_next_child(node, NULL);
        if (!pcie_intc_node) {
                dev_err(dev, "No PCIe Intc node found\n");