[DAG] getFreeze()/getNode() - account for operand depth when calling isGuaranteedNotT...

Similar to #57402 - we were calling isGuaranteedNotToBeUndefOrPoison on the freeze operand (with Depth = 0), but wasn't accounting for the fact that a later isGuaranteedNotToBeUndefOrPoison assertion will call from the new node (with Depth = 0 as well) - which will then recursively call isGuaranteedNotToBeUndefOrPoison for its operands with Depth = 1

Fixes #57554

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index cffdc3a..fa028cf 100644 (file)
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -5235,7 +5235,8 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
     break;
   case ISD::FREEZE:
     assert(VT == Operand.getValueType() && "Unexpected VT!");
-    if (isGuaranteedNotToBeUndefOrPoison(Operand))
+    if (isGuaranteedNotToBeUndefOrPoison(Operand, /*PoisonOnly*/ false,
+                                         /*Depth*/ 1))
       return Operand;
     break;
   case ISD::TokenFactor:

diff --git a/llvm/test/CodeGen/X86/pr57554.ll b/llvm/test/CodeGen/X86/pr57554.ll
new file mode 100644 (file)
index 0000000..0eb4097
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr57554.ll
@@ -0,0 +1,25 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+
+@a = external dso_local local_unnamed_addr global i8, align 1
+
+define void @PR57554() {
+; CHECK-LABEL: PR57554:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movb %al, a(%rip)
+; CHECK-NEXT:    retq
+  %.fr13 = freeze i8 undef
+  %i = xor i8 %.fr13, -1
+  %not = sext i8 %i to i32
+  %add = add i32 %not, 2147483647
+  %or = or i32 %add, -1794967296
+  %or4 = or i32 %or, 0
+  %not5 = xor i32 %or4, -1
+  %sub = add nsw i32 0, -1
+  %add7 = add nsw i32 %sub, %not5
+  %add7.fr = freeze i32 %add7
+  %i1 = trunc i32 %add7.fr to i8
+  %conv10 = select i1 false, i8 0, i8 %i1
+  store i8 %conv10, ptr @a, align 1
+  ret void
+}