drm/amd/display: Cursor lag with PSR1 eDP

[Why]
On edp with psr1, we do not provide updates
of the cursor position regularly to firmware
like with PSR2. To send updates regularly,
the flag enable_sw_cntl_psr has to equal 1,
but cursor update should be provided
regularly to FW regardless of that flag.

[How]
Ensure that we always send cursor updates to
firmware when PSR version equals 1.

Reviewed-by: Robin Chen <robin.chen@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: Gabe Teeger <gabe.teeger@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 37246e9..1eb3957 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -3343,11 +3343,7 @@ static bool dcn10_dmub_should_update_cursor_data(
        if (dcn10_can_pipe_disable_cursor(pipe_ctx))
                return false;
 
-       if (pipe_ctx->stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1)
-               return true;
-
-       if (pipe_ctx->stream->link->psr_settings.psr_version == DC_PSR_VERSION_1 &&
-           debug->enable_sw_cntl_psr)
+       if (pipe_ctx->stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1 || pipe_ctx->stream->link->psr_settings.psr_version == DC_PSR_VERSION_1)
                return true;
 
        return false;