vpp: sr: enable sr core0 directly for txlx [1/1]

PD#TV-3260

Problem:
Since the Super scaler on txlx has the latch function
and can not disable it. So need adjust the super scaler
on/off operation flow.

Solution:
write the enable bit of sr core0 directly, not rdma write.

Verify:
r311, verify pass

Change-Id: If1b27205cbb1c49dd6a3ad65a08e2ca1e3f04b62
Signed-off-by: Brian Zhu <brian.zhu@amlogic.com>

diff --git a/drivers/amlogic/media/video_sink/vpp.c b/drivers/amlogic/media/video_sink/vpp.c
index 541ae60..be2e0e8 100644 (file)
--- a/drivers/amlogic/media/video_sink/vpp.c
+++ b/drivers/amlogic/media/video_sink/vpp.c
@@ -1766,10 +1766,16 @@ int vpp_set_super_scaler_regs(
                                        SRSHARP0_SHARP_SR2_CTRL + sr_reg_offt,
                                        0, 2, 1);
                } else {
-                       if (((tmp_data >> 2) & 0x1) != 1)
+                       if (((tmp_data >> 2) & 0x1) != 1) {
+                               if (is_meson_txlx_cpu())
+                                       WRITE_VCBUS_REG_BITS(
+                                               SRSHARP0_SHARP_SR2_CTRL
+                                               + sr_reg_offt,
+                                               1, 2, 1);
                                VSYNC_WR_MPEG_REG_BITS(
                                        SRSHARP0_SHARP_SR2_CTRL + sr_reg_offt,
                                        1, 2, 1);
+                       }
                }
 
                if ((tmp_data & 0x1) == (reg_srscl0_hori_ratio & 0x1))