arm64: dts: qcom: msm8996: Add Venus video codec DT node
authorStanimir Varbanov <stanimir.varbanov@linaro.org>
Thu, 25 Jul 2019 12:39:49 +0000 (15:39 +0300)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Mon, 5 Aug 2019 22:11:38 +0000 (15:11 -0700)
This adds Qualcomm Venus video codec DT node for the video
codec hardware found in MSM8996 platforms.

Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/msm8996.dtsi

index 766abed..87f4d9c 100644 (file)
                                              "ref";
                        };
                };
+
+               venus_smmu: arm,smmu-venus@d40000 {
+                       compatible = "qcom,msm8996-smmu-v2", "qcom,smmu-v2";
+                       reg = <0xd40000 0x20000>;
+                       #global-interrupts = <1>;
+                       interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
+                       power-domains = <&mmcc MMAGIC_VIDEO_GDSC>;
+                       clocks = <&mmcc SMMU_VIDEO_AHB_CLK>,
+                                <&mmcc SMMU_VIDEO_AXI_CLK>;
+                       clock-names = "iface", "bus";
+                       #iommu-cells = <1>;
+                       status = "okay";
+               };
+
+               video-codec@c00000 {
+                       compatible = "qcom,msm8996-venus";
+                       reg = <0x00c00000 0xff000>;
+                       interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+                       power-domains = <&mmcc VENUS_GDSC>;
+                       clocks = <&mmcc VIDEO_CORE_CLK>,
+                                <&mmcc VIDEO_AHB_CLK>,
+                                <&mmcc VIDEO_AXI_CLK>,
+                                <&mmcc VIDEO_MAXI_CLK>;
+                       clock-names = "core", "iface", "bus", "mbus";
+                       iommus = <&venus_smmu 0x00>,
+                                <&venus_smmu 0x01>,
+                                <&venus_smmu 0x0a>,
+                                <&venus_smmu 0x07>,
+                                <&venus_smmu 0x0e>,
+                                <&venus_smmu 0x0f>,
+                                <&venus_smmu 0x08>,
+                                <&venus_smmu 0x09>,
+                                <&venus_smmu 0x0b>,
+                                <&venus_smmu 0x0c>,
+                                <&venus_smmu 0x0d>,
+                                <&venus_smmu 0x10>,
+                                <&venus_smmu 0x11>,
+                                <&venus_smmu 0x21>,
+                                <&venus_smmu 0x28>,
+                                <&venus_smmu 0x29>,
+                                <&venus_smmu 0x2b>,
+                                <&venus_smmu 0x2c>,
+                                <&venus_smmu 0x2d>,
+                                <&venus_smmu 0x31>;
+                       memory-region = <&venus_region>;
+                       status = "okay";
+
+                       video-decoder {
+                               compatible = "venus-decoder";
+                               clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
+                               clock-names = "core";
+                               power-domains = <&mmcc VENUS_CORE0_GDSC>;
+                       };
+
+                       video-encoder {
+                               compatible = "venus-encoder";
+                               clocks = <&mmcc VIDEO_SUBCORE1_CLK>;
+                               clock-names = "core";
+                               power-domains = <&mmcc VENUS_CORE1_GDSC>;
+                       };
+               };
        };
 
        sound: sound {