#ifndef __MIPS_ASM_MIPS_CPS_H__
#define __MIPS_ASM_MIPS_CPS_H__
+#include <linux/bitfield.h>
#include <linux/io.h>
#include <linux/types.h>
*/
static inline unsigned int mips_cps_numclusters(void)
{
- unsigned int num_clusters;
-
if (mips_cm_revision() < CM_REV_CM3_5)
return 1;
- num_clusters = read_gcr_config() & CM_GCR_CONFIG_NUM_CLUSTERS;
- num_clusters >>= __ffs(CM_GCR_CONFIG_NUM_CLUSTERS);
- return num_clusters;
+ return FIELD_GET(CM_GCR_CONFIG_NUM_CLUSTERS, read_gcr_config());
}
/**
return 0;
/* Add one before masking to handle 0xff indicating no cores */
- return (mips_cps_cluster_config(cluster) + 1) & CM_GCR_CONFIG_PCORES;
+ return FIELD_GET(CM_GCR_CONFIG_PCORES,
+ mips_cps_cluster_config(cluster) + 1);
}
/**
*/
static inline unsigned int mips_cps_numiocu(unsigned int cluster)
{
- unsigned int num_iocu;
-
if (!mips_cm_present())
return 0;
- num_iocu = mips_cps_cluster_config(cluster) & CM_GCR_CONFIG_NUMIOCU;
- num_iocu >>= __ffs(CM_GCR_CONFIG_NUMIOCU);
- return num_iocu;
+ return FIELD_GET(CM_GCR_CONFIG_NUMIOCU,
+ mips_cps_cluster_config(cluster));
}
/**
mips_cm_unlock_other();
- return (cfg + 1) & CM_GCR_Cx_CONFIG_PVPE;
+ return FIELD_GET(CM_GCR_Cx_CONFIG_PVPE, cfg + 1);
}
#endif /* __MIPS_ASM_MIPS_CPS_H__ */