ARM: dts: sunxi: Fix OPP arrays

Even though it translates to the same thing down to the binary level, we
should have an array of 2 number cells to describe each OPP, which in
turns create a validation warning.

Let's fix this.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20210901091852.479202-42-maxime@cerno.tech

diff --git a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
index ad0e25a..83d283c 100644 (file)
--- a/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
+++ b/arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
@@ -91,12 +91,11 @@
        /*
         * The A10-Lime is known to be unstable when running at 1008 MHz
         */
-       operating-points = <
-               /* kHz    uV */
-               912000  1350000
-               864000  1300000
-               624000  1250000
-               >;
+       operating-points =
+               /* kHz    uV */
+               <912000 1350000>,
+               <864000 1300000>,
+               <624000 1250000>;
 };
 
 &de {

diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 1c5a666..51a6464 100644 (file)
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -115,13 +115,12 @@
                        reg = <0x0>;
                        clocks = <&ccu CLK_CPU>;
                        clock-latency = <244144>; /* 8 32k periods */
-                       operating-points = <
+                       operating-points =
                                /* kHz    uV */
-                               1008000 1400000
-                               912000  1350000
-                               864000  1300000
-                               624000  1250000
-                               >;
+                               <1008000 1400000>,
+                               <912000 1350000>,
+                               <864000 1300000>,
+                               <624000 1250000>;
                        #cooling-cells = <2>;
                };
        };

diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index 7075e10..3325ab0 100644 (file)
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -102,15 +102,14 @@
 
 &cpu0 {
        clock-latency = <244144>; /* 8 32k periods */
-       operating-points = <
+       operating-points =
                /* kHz    uV */
-               1008000 1400000
-               912000  1350000
-               864000  1300000
-               624000  1200000
-               576000  1200000
-               432000  1200000
-               >;
+               <1008000 1400000>,
+               <912000 1350000>,
+               <864000 1300000>,
+               <624000 1200000>,
+               <576000 1200000>,
+               <432000 1200000>;
        #cooling-cells = <2>;
 };
 

diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index a31f907..715d748 100644 (file)
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -105,13 +105,12 @@
                        reg = <0>;
                        clocks = <&ccu CLK_CPU>;
                        clock-latency = <244144>; /* 8 32k periods */
-                       operating-points = <
+                       operating-points =
                                /* kHz    uV */
-                               1008000 1200000
-                               864000  1200000
-                               720000  1100000
-                               480000  1000000
-                               >;
+                               <1008000 1200000>,
+                               <864000 1200000>,
+                               <720000 1100000>,
+                               <480000 1000000>;
                        #cooling-cells = <2>;
                };
 
@@ -121,13 +120,12 @@
                        reg = <1>;
                        clocks = <&ccu CLK_CPU>;
                        clock-latency = <244144>; /* 8 32k periods */
-                       operating-points = <
+                       operating-points =
                                /* kHz    uV */
-                               1008000 1200000
-                               864000  1200000
-                               720000  1100000
-                               480000  1000000
-                               >;
+                               <1008000 1200000>,
+                               <864000 1200000>,
+                               <720000 1100000>,
+                               <480000 1000000>;
                        #cooling-cells = <2>;
                };
 
@@ -137,13 +135,12 @@
                        reg = <2>;
                        clocks = <&ccu CLK_CPU>;
                        clock-latency = <244144>; /* 8 32k periods */
-                       operating-points = <
+                       operating-points =
                                /* kHz    uV */
-                               1008000 1200000
-                               864000  1200000
-                               720000  1100000
-                               480000  1000000
-                               >;
+                               <1008000 1200000>,
+                               <864000 1200000>,
+                               <720000 1100000>,
+                               <480000 1000000>;
                        #cooling-cells = <2>;
                };
 
@@ -153,13 +150,12 @@
                        reg = <3>;
                        clocks = <&ccu CLK_CPU>;
                        clock-latency = <244144>; /* 8 32k periods */
-                       operating-points = <
+                       operating-points =
                                /* kHz    uV */
-                               1008000 1200000
-                               864000  1200000
-                               720000  1100000
-                               480000  1000000
-                               >;
+                               <1008000 1200000>,
+                               <864000 1200000>,
+                               <720000 1100000>,
+                               <480000 1000000>;
                        #cooling-cells = <2>;
                };
        };

diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi.dts b/arch/arm/boot/dts/sun7i-a20-bananapi.dts
index 9d792d7..46ecf9d 100644 (file)
--- a/arch/arm/boot/dts/sun7i-a20-bananapi.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapi.dts
@@ -104,16 +104,15 @@
 
 &cpu0 {
        cpu-supply = <&reg_dcdc2>;
-       operating-points = <
+       operating-points =
                /* kHz    uV */
-               960000  1400000
-               912000  1400000
-               864000  1350000
-               720000  1250000
-               528000  1150000
-               312000  1100000
-               144000  1050000
-               >;
+               <960000 1400000>,
+               <912000 1400000>,
+               <864000 1350000>,
+               <720000 1250000>,
+               <528000 1150000>,
+               <312000 1100000>,
+               <144000 1050000>;
 };
 
 &de {

diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 5a40e02..5574299 100644 (file)
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -106,16 +106,15 @@
                        reg = <0>;
                        clocks = <&ccu CLK_CPU>;
                        clock-latency = <244144>; /* 8 32k periods */
-                       operating-points = <
+                       operating-points =
                                /* kHz    uV */
-                               960000  1400000
-                               912000  1400000
-                               864000  1300000
-                               720000  1200000
-                               528000  1100000
-                               312000  1000000
-                               144000  1000000
-                               >;
+                               <960000 1400000>,
+                               <912000 1400000>,
+                               <864000 1300000>,
+                               <720000 1200000>,
+                               <528000 1100000>,
+                               <312000 1000000>,
+                               <144000 1000000>;
                        #cooling-cells = <2>;
                };
 
@@ -125,16 +124,15 @@
                        reg = <1>;
                        clocks = <&ccu CLK_CPU>;
                        clock-latency = <244144>; /* 8 32k periods */
-                       operating-points = <
+                       operating-points =
                                /* kHz    uV */
-                               960000  1400000
-                               912000  1400000
-                               864000  1300000
-                               720000  1200000
-                               528000  1100000
-                               312000  1000000
-                               144000  1000000
-                               >;
+                               <960000 1400000>,
+                               <912000 1400000>,
+                               <864000 1300000>,
+                               <720000 1200000>,
+                               <528000 1100000>,
+                               <312000 1000000>,
+                               <144000 1000000>;
                        #cooling-cells = <2>;
                };
        };