[X86] Fix sched class typo - the CVTPD2DQrr instructions were mapping to ZnWriteCVTDQ...
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Sun, 13 Nov 2022 09:34:19 +0000 (09:34 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Sun, 13 Nov 2022 09:34:27 +0000 (09:34 +0000)
llvm/lib/Target/X86/X86ScheduleZnver1.td

index 705100d..1185d5f 100644 (file)
@@ -1233,7 +1233,7 @@ def ZnWriteCVTPD2DQr: SchedWriteRes<[ZnFPU12, ZnFPU3]> {
 }
 // CVT(T)PD2DQ.
 // x,x.
-def : InstRW<[ZnWriteCVTDQ2PDr], (instregex "(V?)CVT(T?)PD2DQrr")>;
+def : InstRW<[ZnWriteCVTPD2DQr], (instregex "(V?)CVT(T?)PD2DQrr")>;
 
 def ZnWriteCVTPD2DQLd: SchedWriteRes<[ZnAGU,ZnFPU12,ZnFPU3]> {
   let Latency = 12;